Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2011-08-30
2011-08-30
Such, Matthew W (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S209000, C257SE23147, C257SE23149, C365S148000, C977S943000
Reexamination Certificate
active
08008745
ABSTRACT:
A non-volatile latch circuit is provided. The non-volatile latch circuit includes a nanotube switching element capable of switching between resistance states and non-volatilely retaining the resistance state. The non-volatile latch circuit includes a volatile latch circuit is capable of receiving and volatilely storing a logic state. When the nanotube switching element is a resistance state, the volatile latch circuit retains a corresponding logic state and outputs that corresponding logic state at an output terminal. A non-volatile register file configuration circuit for use with a plurality of non-volatile register files is also provided. The non-volatile register file configuration circuit includes a selection circuitry and a plurality of nanotube fuse elements, each in electrical communication with one of a plurality of non-volatile register files. The selection circuitry is capable of applying electrical stimulus to each of the selected nanotube fuse elements to selectively bypass the corresponding register file.
REFERENCES:
patent: 3922648 (1975-11-01), Buckley
patent: 5005158 (1991-04-01), McClure et al.
patent: 5345110 (1994-09-01), Renfro et al.
patent: 5416737 (1995-05-01), Lingstaedt et al.
patent: 5491655 (1996-02-01), Hirose et al.
patent: 5768196 (1998-06-01), Bloker et al.
patent: 5912937 (1999-06-01), Goetting et al.
patent: 5956282 (1999-09-01), Casper
patent: 6008523 (1999-12-01), Narayan et al.
patent: 6128214 (2000-10-01), Kuekes et al.
patent: 6256767 (2001-07-01), Kuekes et al.
patent: 6259644 (2001-07-01), Tran et al.
patent: 6314019 (2001-11-01), Kuekes et al.
patent: 6385075 (2002-05-01), Taussig et al.
patent: 6422450 (2002-07-01), Zhou et al.
patent: 6423583 (2002-07-01), Avouris et al.
patent: 6445006 (2002-09-01), Brandes et al.
patent: 6493272 (2002-12-01), Fujii et al.
patent: 6528020 (2003-03-01), Dai et al.
patent: 6548841 (2003-04-01), Frazier et al.
patent: 6570802 (2003-05-01), Ohtsuka et al.
patent: 6570806 (2003-05-01), Bertin et al.
patent: 6624499 (2003-09-01), Kothandaraman et al.
patent: 6707098 (2004-03-01), Hofmann et al.
patent: 6750802 (2004-06-01), Olen
patent: 6759693 (2004-07-01), Vogeli et al.
patent: 6803840 (2004-10-01), Hunt et al.
patent: 6808746 (2004-10-01), Dai et al.
patent: 6809465 (2004-10-01), Jin
patent: 6831856 (2004-12-01), Pashmakov
patent: 6888773 (2005-05-01), Morimoto
patent: 6890780 (2005-05-01), Lee
patent: 6899945 (2005-05-01), Smalley et al.
patent: 6905892 (2005-06-01), Esmark et al.
patent: 6918284 (2005-07-01), Snow et al.
patent: 6919592 (2005-07-01), Segal et al.
patent: 6919740 (2005-07-01), Snider
patent: 6921575 (2005-07-01), Horiuchi et al.
patent: 6990009 (2006-01-01), Bertin et al.
patent: 7015500 (2006-03-01), Choi et al.
patent: 7115901 (2006-10-01), Bertin et al.
patent: 7115960 (2006-10-01), Bertin
patent: 7161403 (2007-01-01), Bertin
patent: 7781862 (2010-08-01), Bertin et al.
patent: 2001/0010656 (2001-08-01), Mattison
patent: 2001/0023986 (2001-09-01), Mancevski
patent: 2002/0027819 (2002-03-01), Tomanek et al.
patent: 2002/0175390 (2002-11-01), Goldstein et al.
patent: 2003/0200521 (2003-10-01), DeHon et al.
patent: 2004/0022085 (2004-02-01), Parkinson et al.
patent: 2004/0031975 (2004-02-01), Kern et al.
patent: 2004/0066669 (2004-04-01), Ooishi
patent: 2004/0132070 (2004-07-01), Star et al.
patent: 2004/0266106 (2004-12-01), Lee
patent: 2005/0056877 (2005-03-01), Rueckes et al.
patent: 2005/0212014 (2005-09-01), Horibe et al.
patent: 2006/0044878 (2006-03-01), Perner
patent: 2006/0128071 (2006-06-01), Rankin et al.
patent: 2006/0215439 (2006-09-01), Bill et al.
patent: 2006/0237537 (2006-10-01), Empedocles et al.
patent: 2006/0250843 (2006-11-01), Bertin et al.
patent: 2006/0250856 (2006-11-01), Bertin et al.
patent: 2006/0258122 (2006-11-01), Whitefield et al.
patent: 2006/0264053 (2006-11-01), Yates
patent: 2006/0281256 (2006-12-01), Carter et al.
patent: 2006/0281287 (2006-12-01), Yates et al.
patent: 2006/0292716 (2006-12-01), Gu et al.
patent: 2008/0012047 (2008-01-01), Bertin
patent: 2008/0142850 (2008-06-01), Bertin
patent: 2008/0157126 (2008-07-01), Bertin
patent: 2008/0159042 (2008-07-01), Bertin
patent: 2 364 933 (2002-02-01), None
patent: WO-00/48195 (2000-08-01), None
patent: WO-01/03208 (2001-01-01), None
patent: WO-2005/041204 (2005-05-01), None
patent: WO-2006/122111 (2006-11-01), None
patent: WO-2007/001642 (2007-01-01), None
patent: WO-2008/021912 (2008-02-01), None
Cui, J.B., et al. “Carbon Nanotube Memory Devices of High Charge Storage Stability.” Appl. Phys. Lett., vol. 81, No. 17 (Oct. 21, 2002): pp. 3260-3262.
Avouris, “Carbon nanotube electronics”,Chemical Physics, vol. 281, pp. 429-445, 2002.
Bachtold, A. et al., “Logic Circuits with Carbon Nanotube Transistors”,Science, Nov. 9, 2001, vol. 294, pp. 1317-1320.
Chen, J. et al., “Self-aligned carbon nanotube transistors with charge transfer doping”,Applied Physics Letters, vol. 86, pp. 123108-1-123108-3, 2005.
Chen, J. et al., “Self-aligned Carbon Nanotube Transistors with Novel Chemical Doping”,IEDM, pp. 29.4.1-29.4.4, 2004.
Collins, P. G. et al., “Engineering Carbon Nanotubes and Nanotube Circuits Using Electrical Breakdown”,Science, vol. 292, pp. 706-709, Apr. 27, 2001.
Derycke, V. et al., “Controlling doping and carrier injection in carbon nanotube transistors”,Applied Physics Letters, vol. 80, No. 15, pp. 2773-2775, Apr. 15, 2002.
Derycke, V., et al., “Carbon Nanotube Inter- and Intramolecular Logic Gates,”Nano Letters, Sep. 2001, vol. 1, No. 9, pp. 453-456.
Duan, X. et al., “Nonvolatile Memory and Programmable Logic from Molecule-Gated Nanowires”,Nano Letters, vol. 0, No. 0, pp. A-D, 2002.
Heinze, S. et al., “Carbon Nanotubes as Schottky Barrier Transistsors”,Physical Review Letters, vol. 89, No. 10, pp. 16801-1-106801-4, 2002.
Hone, J., “Phonons and Thermal Properties of Carbon Nanotubes”,Carbon Nanotubes, Topics Appl. Phys., vol. 80, pp. 273-286, 2001.
Huang, Y., et al,, “Logic Gates and Computation from Assembled Nanowire Building Blocks,”Science, Nov. 9, 2001, vol. 294, pp. 1313-1316.
Javey, A. et al., “Carbon Nanotube Field-Effect Transistors with Integrated Ohmic Contacts and High-k Gate Dielectrics”,Nano Letters, vol. 4, No. 3, pp. 447-450, 2004.
Javey, A. et al., “High-k dielectrics for advanced carbon-nanotube transistors and logic gates”,Nature Materials, vol. 1, pp. 241-246, Dec. 2002.
Javey, A., et al., “Carbon Nanotube Transistor Arrays for Multistage Complementary Logic and Ring Oscillators,”Nano Letters, 2002, vol. 2 , No. 9, pp. 929-932.
Johnson, R. Colin, “IBM fellow unrolls blueprint for nano”,EETimes, Mar. 6, 2006, 3 pages, http://www.eetimes.com/showArticle.jhtml?articleID=181500304.
Kong, J. et al., “Quantum Interference and Ballistic Transmission in Nanotube Electron Waveguides”,The American Physical Society, vol. 87, No. 10, pp. 106801-1-106801-4, Sep. 3, 2001.
Lin, Y.M. et al., “Novel Carbon Nanotube FET Design with Tunable Polarity”,IEDM, pp. 29.2.1-29.2.4, 2004.
Martel, R., et al, “Carbon Nanotube Field-Effect Transistors and Logic Circuits,”DAC 2002, Jun. 10-12, 2002, vol. 7.4, pp. 94-98.
Onoa, G.B. et al., “Bulk production of singly dispersed carbon nanotubes with prescribed lengths,” Nanotechnology, vol. 16, pp. 2799-2803, 2005.
Radosavljevic, M. et al., “Nonvolatile Molecular Memory Elements Based on Ambipolar Nanotube Field Effect Transistors”,Nano Letters, vol. 2, No. 7, pp. 761-764, 2002.
Rueckes, T., et al., “Carbon Nantotube-Based Nonvolatile Random Access Memory for Molecular Computing,”Science, Jul. 7, 2000, vol. 289, pp. 94-97.
Wind, S. J. et al., “Fabrication and Electrical Characterization of Top Gate Single-Wall Carbon Nanotube Field-Effect Transistors”, Nov. 2002, 14 pages.
Wind, S. J. et al., “Vertical scaling of carbon nanotube field-effect t
Bertin Claude L.
Guo Frank
Konsek Steven L.
Meinhold Mitchell
Rueckes Thomas
Nantero Inc.
Such Matthew W
Wilmer Cutler Pickering Hale and Dorr LLP
LandOfFree
Latch circuits and operation circuits having scalable... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Latch circuits and operation circuits having scalable..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Latch circuits and operation circuits having scalable... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2695432