Latch circuit for amplifying an analog signal and converting an

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

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327219, H03K 3037

Patent

active

057195137

ABSTRACT:
The present invention discloses an improved latch circuit. In the latch circuit, a composite gate takes in a basic clock signal and a delayed clock signal which is delayed by a delay circuit for a specific amount with respect to the basic clock signal, and puts out to a second drive circuit a first signal identical in waveform with the basic block signal, and further puts out to a first drive circuit a second signal that is delayed in the rising timing with respect to the first signal. As a result of such arrangement, when a transition is made from a feedback period during which an input switch has an off state while a feedback switch has an on state to a sampling period during which the input switch has an on state while the feedback switch has an off state, neither the input switch nor the feedback switch has an on state.

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patent: 4745302 (1988-05-01), Hanawa et al.
patent: 4843254 (1989-06-01), Motegi et al.
patent: 5189315 (1993-02-01), Akata
patent: 5264738 (1993-11-01), Veendrick et al.
patent: 5463340 (1995-10-01), Takabatake et al.

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