Latch circuit and synchronous memory including the same

Details Latch circuit and synchronous memory including the same Latch circuit and synchronous memory including the same

2006-09-26

2006-09-26

Tran, Michael T. (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S191000

Reexamination Certificate

active

07113446

ABSTRACT:
A latch system has two latch circuits corresponding to two internal clock signals synchronized with an external output signal. The internal clock signals are synchronized with rising edges of the external clock signal and produced as one-shot pulses having a frequency corresponding to ½ of an external clock frequency of the external clock signal.

REFERENCES:
patent: 6680866 (2004-01-01), Kajimoto
patent: 6680875 (2004-01-01), Horiguchi et al.
patent: 6774674 (2004-08-01), Okamoto et al.

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