Latch circuit and flip-flop circuit having voltage level convert

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

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Details

327202, 327203, H03K 3289

Patent

active

060811536

ABSTRACT:
A master slave type flip-flop circuit having a master latch circuit ML and a slave latch circuit SL has a voltage level converter circuit 20 in the slave latch circuit SL to reduce the number of elements used in the circuit, which results in reducing the power consumption and in increasing the operation speed of the circuit.

REFERENCES:
patent: 5530392 (1996-06-01), Runas et al.
patent: 5559996 (1996-09-01), Fujioka
patent: 5699002 (1997-12-01), Hayakawa
patent: 5815019 (1998-09-01), Uemura et al.
patent: 5892385 (1999-04-01), Hashiguchi
Kawaguchi, et al. "A Reduced Clock-Swing Flip-Flop (RCSFF) for 63% Clock Power Reduction," 1997 Symposium on VLSI Circuits Digest of Technical Papers, pp. 97-98.

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