Electric heating – Metal heating – By arc
Reexamination Certificate
2001-01-16
2003-06-10
Dunn, Tom (Department: 1725)
Electric heating
Metal heating
By arc
C219S121600, C219S121680, C219S121670, C219S121700, C365S189011, C365S189080, C365S225700, C365S200000
Reexamination Certificate
active
06576865
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a laser trimming program generation apparatus and method, a recording medium, and a laser trimming apparatus. In particular, the invention relates to an apparatus and method for generating a program for laser trimming for cutting fuses corresponding to the address of a defective memory cell of a memory core that is incorporated in an IC chip in replacing the defective memory cell with a redundant memory cell, as well as a recording medium on which a program for execution of such a method is recorded and a laser trimming apparatus using such a laser trimming program.
2. Description of Related Art
In general, as the integration density of a semiconductor memory device increases, the yield that is the ratio of good products in a manufacturing process decreases. Since most of defective products of a semiconductor memory device are discarded, increasing the yield is important for cost reduction. In view of this, semiconductor memory devices are provided in advance with redundant memory cells as a relief measure against occurrence of a defective memory cell. A product having only a slight defect is saved as a completely good product of a memory IC by replacing a block including a defective memory cell with redundant memory cells. A common method for such replacement is to use a laser trimming (LT) apparatus that fuses (cuts) lines called fuses corresponding to the address (hereinafter referred to as “defect address”) of a defective memory cell by heating those with laser light.
A defect address is found by an electrical test that is performed in advance by using an IC chip testing apparatus. For defective IC chips that are judged relievable by replacement with redundant memory cells among defective IC chips having a defect address, defect address data or data obtained by coding a defect address are passed to an LT apparatus.
In general, the number of combinations (coordinates) of addresses indicating locations of memory cells is enormous and the number of fuses corresponding to a defect address is extremely large. Therefore, fuse coordinates corresponding to a defect address coordinate are obtained by describing a fuse coordinate calculation algorithm for calculating coordinates of fuses to be cut based on bit data of a defective address in a program for an LT apparatus (hereinafter referred to as “LT program”) as a fuse coordinate calculation program.
Since the fuse coordinates and the algorithm for obtaining fuse coordinates (fuse coordinate calculation formula) depends on the semiconductor memory device, the above-mentioned fuse coordinate calculation program is generated for each semiconductor memory device. Further, defect address data or the like are passed to the above-mentioned LT apparatus in the form of a specification. Therefore, a program is developed entirely by human hands. This results in problems that conventionally errors due to development by human hands unavoidably occur at a strong possibility in generating an LT program and that the time necessary for generation of an LT program depends on experiences etc. of a person who generates it.
On the other hand, as for recent development trends of system LSI devices, even more functions have come to be provided in a single device and many devices in which logic and analog functions and a large-capacity memory (e.g., 1 megabits or more) are incorporated in mixture in an LSI chip (hereinafter referred to as “memory-inclusive device”) have been developed. In memory-inclusive devices, once developed a memory device portion to be incorporated is put in a library in circuit designing (in the following description, a memory device portion that is put in a library will be called “memory core”). A memory device portion is incorporated in plural kinds of system LSI devices as long as circuit specifications such as an address bus size and a bus size are the same.
In system LSI devices of the above kind, fuse coordinates corresponding to a defect address coordinate can be obtained by using the same fuse coordinate calculation formula for different LSI chips as long as the inside of a memory core is concerned. However, in practice, there is a problem that since fuse coordinates with respect to the coordinate origin of an LSI chip are needed, LT programs need to be corrected manually even in a case of using memory-inclusive devices incorporating the same memory core.
As described above, there are problems that errors due to development by human hands unavoidably occur at a strong possibility in generating a conventional LT program and that the time necessary for generation of a program depends on experiences etc. of a person who generates it. There is another problem that LT programs need to be corrected manually even in a case of using memory-inclusive devices incorporating the same memory core.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above problems in the art, and an object of the invention is therefore to provide an apparatus and method for generating a laser trimming program without causing errors as would otherwise occur unavoidably when a program is developed by human hands in a time that does not depend on experiences etc. of a person who generates a program, as well as a recording medium on which a program for execution of such a method is recorded and a laser trimming apparatus using such a laser trimming program.
According to a first aspect of the present invention, there is provided a laser trimming program generation apparatus comprising: a common program recording section in which an IC-chip-independent common program of a program for laser trimming for cutting fuses corresponding to an address of a defective memory cell of a memory core that is incorporated in an IC chip and used for recording of information in replacing the defective memory cell with a redundant memory cell is recorded; a coordinate calculation program recording section in which fuse coordinate calculation programs for determining coordinates of fuses to be cut are recorded on a memory core basis; parameter input means for inputting memory core location parameters including type information indicating a type of a memory core and location-in-IC-chip information indicating a location of the memory core in an IC chip; selecting means for selecting a fuse coordinate calculation program corresponding to the memory core from the fuse coordinate calculation programs recorded in the coordinate calculation program recording section based on the type information of the memory core that has been input through the parameter input means; fuse coordinate calculation program generating means for generating a fuse coordinate calculation program dependent on the IC chip of a laser trimming program based on the fuse coordinate calculation program corresponding to the memory core that has been selected by the selecting means and the memory core location parameters of the memory core in the IC chip that have been input through the parameter input means; and laser trimming program generating means for generating a laser trimming program by incorporating the fuse coordinate calculation program that has been generated by the fuse coordinate calculation program generating means into the common program recorded in the common program recording section.
According to a second aspect of the present invention, there is provided a laser trimming apparatus which performs laser trimming by using the laser trimming program that is recorded in the laser trimming program recording section as set forth in the present invention of claim 3.
According to a third aspect of the present invention, there is provided a laser trimming program generation method for generating a laser trimming program by using a common program recording section in which an IC-chip-independent common program of a program for laser trimming for cutting fuses corresponding to an address of a defective memory cell of a memory core that is incorporated in an IC chip and used for recording of informati
Fukushima Yasuhiko
Higashigawa Yoshihiro
Tanaka Masakazu
Dunn Tom
Edmondson L.
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