Laser trimmed integrated circuit

Details Laser trimmed integrated circuit Laser trimmed integrated circuit

1992-03-17

1993-08-10

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

257529, 257530, 257532, 257533, 257534, 257538, H01L 2702

Patent

active

052352056

ABSTRACT:
A method including covering the area to be laser trimmed with a first insulative layer having a thickness sufficiently thin that a layer can trim the area through the first insulative layer. An etch stop is formed on the first insulative layer over the area to be trimmed and covered with a second insulative layer. A portion of the second insulative layer is etched to expose the etch stop and a portion of the etch stop is then removed to expose a portion of the first insulative layer and laser trimming is conducted through the exposed first insulative layer. The etch stop is part of a first level of interconnects made of the same material and simultaneously with the etch stop. The area to be trimmed is part of a second level of contacts that interconnect another second material.

REFERENCES:
patent: 4764485 (1988-08-01), Loughran et al.
patent: 4960729 (1990-10-01), Orbach et al.
M. J. Rand "Reliability of LSI Memory Circuits Exposed to Laser Cutting," 17th Annual Proceedings Reliability Physics, San Francisco, Calif. (Apr. 24-26, 1979).
J. B. Gullette & D. M. Green "Laser Personalization of NMOS Digital Topologies", 1983 IEEE International Symposium on Circuits and Systems, Newport Beach, Calif. May 2-4, 1983, vol. 3, pp. 1249-1252.

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