Laser lithography for integrated circuit and integrated circuit

Details Laser lithography for integrated circuit and integrated circuit Laser lithography for integrated circuit and integrated circuit

1991-03-01

1993-03-23

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437173, 437229, H01L 21302, H01L 21268

Patent

active

051963760

ABSTRACT:
A laser lithography process for semiconductor interconnect and semiconductor manufacture having the advantages of non-contact printing processes and being much faster than prior art laser lithography processes is disclosed. In accordance with the process, a metal layer to be patterned either for use as a patterned metal layer or as a mask for patterning a layer therebelow, such as a think polyimide layer, is first coated with a very thin layer of polymer evaporated as a monomer using a vapor deposition process. This provides a very thin layer of polymer over the metal layer, which thin polymer layer is readily and quickly patterned by laser to provide a mask for the subsequent chemical etching of the metal layer. The vapor deposited polymer layer, while being very thin and thus readily removed by laser, is also substantially fault free, thereby providing a high-quality mask for the chemical etching process free of any possible damage from ordinary sources such as mask aligners, etc., yet being readily removed when desired such as by way of example, by plasma etching thereof. Various methods and applications are disclosed.

REFERENCES:
patent: 4180614 (1979-12-01), Angelo
patent: 4764485 (1988-08-01), Loughran et al.
patent: 4789648 (1988-12-01), Chow et al.

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