Laser diode driving circuit

Coherent light generators – Particular component circuitry – For driving or controlling laser

Reexamination Certificate

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Details

C372S038030, C372S038070, C372S029015

Reexamination Certificate

active

06826215

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a laser diode driving circuit that drives laser diodes used as light sources for recording/reproducing or the like in optical communications, laser printers, CDs (Compact Disks), DVDs (Digital Versatile Disks) or the like.
2. Prior Art
When a laser diode is used as a light source for the recording/reproducing or the like in optical communications, laser printers, CDs, DVDs or the like, a pulse current flowing through the laser diode is as large as tens to hundreds of milliamperes, and is switched at high speed (specifically, at a rise/fall time of 1 nsec or less).
FIGS. 16 and 18
show an example of the configuration of essential parts of a conventional laser diode driving circuit. The conventional laser diode driving circuit shown in
FIG. 16
is arranged such that a current source
100
is connected to a laser diode
102
through a switching element
101
, and this element
101
is driven to supply the laser diode
102
with a desired pulse current.
Further, another conventional laser diode driving circuit shown in
FIG. 18
is designed such that a first current source
200
is directly connected to an anode of a laser diode
201
, and a series circuit consisting of a second current source
203
for current sinking and a pseudo load
204
is connected to a junction or node between the first current source
200
and the laser diode
201
through a switching element
202
, and this element
202
is driven to supply the laser diode
202
with a pulse current. The second current source
203
supplies an output current whose value is different from that supplied from the first current source
200
.
The conventional laser diode driving circuits shown in
FIGS. 16 and 18
will be described specifically. The laser diode driving circuit shown in
FIG. 16
has a main part comprised of the current source
100
that supplies the laser diode
102
with a 100 mA current, and an NMOS transistor
101
functioning as the switching element connected between an anode of the laser diode
102
and the current source
100
.
In the above configuration, as shown in
FIG. 17A
, for example, a 100 MHz pulse voltage signal is applied to a gate of the NMOS transistor
101
to switch the transistor
101
. As a result, a current pulse whose height is 100 mA is generated at a node OUT
1
and flows into the laser diode (FIG.
17
B).
However, the potential at a node N
1
, which is a junction between the current source
100
and the NMOS transistor
101
, increases to a level near a source voltage Vdd when the NMOS transistor
101
turns off, and hence this potential does not drop from such level near the source voltage Vdd immediately when the NMOS transistor
101
turns on again (FIG.
17
C). As a result, the current pulse generated at the node OUT
1
does not respond quickly to the pulse voltage signal (
FIG. 17A
) applied to the gate of the NMOS transistor
101
as shown in
FIG. 17B
, and thus the waveform of the current pulse is blunted.
Further, the conventional laser diode driving circuit shown in
FIG. 18
has a main part comprised of the first current source
200
that supplies a 100 mA current to the laser diode
201
, the NMOS transistor
202
as the switching element whose drain is connected to a junction between the first current source
200
and the laser diode
201
, the second current source
203
for current sinking connected to a source of the NMOS transistor
202
, for supplying an output current (50 mA) different from that supplied from the first current source
200
, and the pseudo load
204
connected to the second current source
203
.
In the above configuration, as shown in
FIG. 19A
, for example, a 100 MHz pulse voltage signal is applied to a gate of the NMOS transistor
202
to switch the transistor
202
. As a result, during an on period of the NMOS transistor
202
, a 50 mA current I
2
flows from the first current source
200
into the current sinking second current source
203
, and further flows to the pseudo load
204
. Simultaneously, a 50 mA current I
1
flows from the first current source
200
to the laser diode
201
. On the other hand, during an off period of the NMOS transistor
202
, the current I
2
flowing into the second current source
203
assumes 0 mA, whereby the current I
1
flowing from the first current source
200
to the laser diode
201
assumes 100 mA (FIGS.
19
B and
19
C).
When the NMOS transistor
202
is switched from on to off under this condition, the potential at a node OUT
2
assumes the ground potential (0 V), and hence the 50 mA current does not flow to the pseudo load
204
immediately even when the NMOS transistor
202
turns on again. As a result, the current I
1
flowing into the laser diode
201
cannot respond quickly to the pulse voltage signal (
FIG. 19A
) applied to the gate of the NMOS transistor
202
, and thus the waveform of the current pulse is blunted.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a laser diode driving circuit which is capable of supplying a laser diode thereof with a high-speed pulse current.
To attain the above object, in a first aspect of the present invention, there is provided a circuit for driving a laser diode, comprising a current source that supplies a current to the laser diode, a first switch connected between the current source and the laser diode, a second switch connected between a junction between the current source and the first switch and a pseudo load, and a controller that supplies a first voltage pulse signal to the first switch and a second voltage pulse signal opposite in phase to the first voltage pulse signal to the second switch to switch the first and second switches in a complementary manner.
According to the above configuration, a constant current always flows through the junction between the current source and the first switch so that the potential at the junction is kept from varying. As a result, the laser diode can be supplied with a high-speed pulse current.
Further, to attain the above object, in a second aspect of the present invention, there is provided a circuit for driving a laser diode having a cathode and an anode, comprising a first current source connected to the anode of the laser diode, the cathode of which is grounded, for supplying an offset current to the laser diode, a second current source that supplies a current for superimposition upon the offset current, a first switch connected between the second current source and the anode of the laser diode, a second switch connected between a junction between the second current source and the first switch and a pseudo load, and a controller that supplies a first voltage pulse signal to the first switch and a second voltage pulse signal opposite in phase to the first voltage pulse signal to the second switch to switch the first and second switches in a complementary manner.
According to the above configuration, a constant current always flows through the junction between the second current source and the first switch so that the potential at the junction is kept from varying. Therefore, the laser diode can be supplied with a high-speed pulse current wherein the current pulse obtained from the current supplied from the second current source by switching the first switch is superimposed upon the offset current from the first current source.
Further, to attain the above object, in a third aspect of the present invention, there is provided a circuit for driving a laser diode having a cathode and an anode, comprising a first current source connected between the anode of the laser diode, the cathode of which is grounded, for supplying an offset current to the laser diode, at least two second current sources each having an output, for supplying currents for superimposition upon the offset current, first switches connected between the outputs of the at least two second current sources and the anode of the laser diode, second switches connected between respective junctions between the outputs of the at l

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