Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2000-11-27
2003-05-20
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S209000, C257S530000, C257S665000, C438S132000, C438S215000, C438S281000
Reexamination Certificate
active
06566730
ABSTRACT:
The present invention relates to fuse links used in semiconductor integrated circuits (ICs). More particularly, the present invention relates to a new and improved horizontally extending fuse link and method of fabricating it which includes a vertically configured break point structure that promotes severing the fuse link structure by a laser beam under circumstances which require less precise alignment and less energy, and which promotes a cleaner break with less likelihood of the melted fuse link reconnecting, among other things.
BACKGROUND OF THE INVENTION
As IC chips continue to decrease in size and increase in complexity, there is an increasing likelihood of fabricating a defective chip as a result of a failed element or a defective conductor. One way to reduce the number of defective chips which must be scrapped due to fabrication defects is to build selectively programmable fuse links into the IC. The fuse links may be blown, opened or severed to isolate defective semiconductor structures on the IC, and to insert properly functioning circuitry in place of the defective circuitry. As a result, the faulty IC is repaired and becomes useable. The yield or number of properly functioning IC chips obtained from the fabrication process is increased. Using selectively-severable fuse links reduce the number of IC chips which must be scrapped due to defects. Such fuse links are also be used for other purposes on a properly functioning IC, such as trimming circuitry or enabling a particular functional mode of the IC.
Fuse links are frequently used in conjunction with redundant memory cells of memory ICs or embedded memory segments in application specific integrated circuits (ASICs) or system level integrated circuits (SLICs). If a memory cell is defective, a redundant memory cell is substituted and the defective memory cell is disconnected. It is not unusual for IC memory chips or memory segments of ASICs or SLICs to be formed by hundreds of thousands or millions of such memory cells. With such a large number of memory cells, there is a significant risk that at least some of those memory cells will be defective when fabricated. Using breakable fuse links is particularly important in more complex ICs, such as ASICs and SLICs, which have a relatively high proportion of functional circuitry compared to memory. Having to discard or scrap the entire ASIC or SLIC because of a defect in a few memory cells can have enormous financial implications regarding the cost of manufacturing the ASICs or SLICs. Using programmable fuse link structures in memory segments of ASICs or SLICs, as well as in other parts of the IC, increases economic efficiency in IC fabrication by substantially raising the yield of functional circuits produced from the fabrication process.
The typical method of blowing, severing or opening a conventional fuse link involves focusing a laser beam on a fuse structure formed in the IC. The energy density and pulse duration of the laser beam deliver sufficient energy to the fuse link to vaporize or melt the fuse material, thereby severing or opening the pre-existing electrical path through the fuse link. Once the electrical path has been opened, current can no longer flow through it. The circuitry of the IC has been designed to respond to this open circuit by disconnecting defective circuit elements and inserting correctly functioning circuit elements. Recent ICs include multiple layers of the electrical conductors overlying a substrate upon which the functional logic and memory devices are formed. Each of these layers of electrical conductors is referred to as an interconnect layer. In modern ICs, as many as six interconnect layers may be formed on top of the substrate. By routing most of the electrical signal paths through the interconnect layers, more of the area of the substrate is available for forming functional logic and memory devices to achieve greater functionality from smaller IC chips. Since the logic and memory devices are overlaid by metal layers, the breakable fuse links are positioned in an upper interconnect layer so that they may be irradiated by the laser beam.
The fuse links are formed of metals or metal alloys, for example, aluminum-copper (Al—Cu), the same as the metals used in the conductors of the interconnect layers. Other types of conventional breakable fuse links are formed from polysilicon, although polysilicon fuse links are typically formed on the substrate of an IC and not as a part of the interconnect layer. The polysilicon fuse links more efficiently absorb laser energy, allowing lesser energy laser beams to blow polysilicon fuse links. However, metal does not absorb laser energy as efficiently as polysilicon, so the amount of energy delivered by a laser beam to blow a metal fuse link must be increased. The increased laser energy risks the possibility of thermal damage to adjoining circuitry of the IC. Consequently, it is desirable to reduce the amount of energy delivered to the IC by the laser beam to that minimum amount which is effective in blowing the fuse link.
A number of other factors also influence the amount of energy delivered by the laser beam to the fuse link. The ability to precisely position the location of the laser beam is important, because a directly positioned laser beam will be more effective in melting the fuse link. If the laser beam is slightly misaligned, some of the energy density or fluence from the laser beam will be transferred to adjoining elements of the IC and will not be effective in melting the fuse link. Another consideration is that the smallest spot or diameter of a laser beam is presently limited to approximately 2.5 micrometers. In most cases, the width of the conductors used in most modern ICs is smaller than 2.5 micrometers. Therefore there will be some inherent overlap of the laser beam spot with adjoining circuitry. The spacing or “pitch” to adjoining circuitry, typically another fuse link, is thereby defined by the spot size of the laser beam and the ability to precisely position laser beam. A misaligned laser beam, a large laser beam, or a pitch between adjoining laser links which causes the laser beam to overlap and possibly melt adjoining links will not be effective or desirable. Finally, a high-throughput fuse-blowing process is desired in order to increase the manufacturing efficiency. Because these and other constraints can conflict in implementing an effective fuse-blowing process, several prior art techniques have been developed to enhance the fuse blowing process.
Antireflective coatings have been applied to the surface of the IC to confine the energy from the laser beam to the fuse link, rather than reflecting some of the energy to adjoining circuitry. By confining the laser beam energy to the desired fuse link, more of the energy is available to melt the fuse link.
The break point at which the fuse link is severed by a laser beam, has configured photolithographically during the fabrication of the IC to promote absorption of the laser beam energy. The configuration of the fuse link attracts energy from the laser beam and becomes somewhat self-aligning to melt the fuse link. The energy attracting configuration of the fuse link compensates for slight misalignments in the position of the laser beam spot. The self-aligning fuse link configuration also makes the fuse break point less sensitive to the laser beam power. Photolithographic constraints on the fuse link also permit the pitch between adjoining fuses to be reduced to, thereby increasing the density of functional components on the IC chip. Because the laser alignment is less critical, less time is consumed in positioning the laser beam which increases the chip processing throughput.
One type of self aligning fuse link configuration increases the width of the material at the fuse link, under the theory that the increased amount of fuse material will absorb more of the energy from the laser beam and thereby more readily melt the fuse link. Another configuration, which follows the opposite theory, is to reduce the size of the material at the
Castagnetti Ruggero
Giust Gary K.
Liu Yauh-Ching
Ramesh Shiva
Kang Donghee
Ley LLC John R.
LSI Logic Corporation
Thomas Tom
LandOfFree
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