Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2000-04-13
2002-08-27
Flynn, Nathan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S356000, C257S359000, C257S360000, C257S362000, C257S541000
Reexamination Certificate
active
06441460
ABSTRACT:
TECHNICAL FIELD
The invention relates to an electrical resistor formed in an integrated semiconductor circuit.
BACKGROUND OF THE INVENTION
Electrical resistors find application, in particular in a resistor chain as used, for example, for attenuation or amplification of audio signals.
Integrated resistors are formed by resistance regions of semiconductor material which extend between spaced apart terminal contacts. A resistance region may be a diffusion region of a first conductivity type diffused into the surface of a diffused or implanted pocket of the opposite conductivity type. An example hereof is shown in DE 35 26 641 A1. The resistance region may also be a diffusion region of a first conductivity type diffused into the surface of an epitaxial pocket of the opposite conductivity type. Examples thereof are shown in EP 0 001 574 A1 and EP 0 017 919 A1. Moreover, the resistance region can be formed by an epitaxial pocket of a first conductivity type that is formed on a substrate of the opposite conductivity type. In all cases there is a pn junction between the resistance region and the semiconductor material located therebeneath. The semiconductor material located underneath the resistance region has such a potential applied thereto that it is ensured between resistance region and semiconductor material therebeneath, in case of all voltages applied to the terminal contacts of the resistance region, that the pn junction between resistance region and semiconductor material therebeneath is biased in blocking direction, thereby forming, for isolation, a charge-carrier depleted space-charge region between resistance region and semiconductor material located therebeneath. With changing difference between the potential arising in the resistance region and the potential arising in the semiconductor material located therebeneath, the breadth (extension) of the space-charge region changes, which has an effect on the resistance value of the integrated resistor and on the voltage drop along the resistance region of the integrated resistor.
EP 001 574 is not concerned with this problem. This document discloses a semiconductor structure which is flexible with respect to its final usability and in which an N
−
epitaxial layer located on a substrate first has a P
+
region formed therein, with an N
−
region being formed in the surface of the latter. In accordance with the type of contacting, the three-layer structure obtained in the epitaxial layer can be utilized for realizing a transistor or for realizing two resistors on top of each other which are separated from each other by the central layer. Resistance changes arising with changing potential due to the correspondingly changing space-charge region are not avoided in this known structure.
DE 35 26 461 A1 is not concerned with the problem mentioned either. In case of this document, the dependency of the linearity of the divisor ratio of an integrated resistor chain on the contact resistances of the contacting regions of the individual resistors of the resistor chain is counteracted by forming the individual resistors not in one single common resistance path, but by forming each individual resistor in a separate resistance path with two terminal contact regions.
In case of the semiconductor structure known from EP 0 017 919 A1, the dependency of an integrated resistor on changes in the space-charge region isolating the resistor and dependent on potential changes, is reduced by forming the resistor by two series-connected resistance regions each having associated therewith a respective insulating region of its own of an epitaxial layer located underneath the resistance regions, which both have different potentials applied thereto. In said document, such potential application to the individual resistance regions and the individual insulating regions is carried out that, in case of a change in voltage applied to the two resistance regions, a resistance reduction of the one resistance region and a resistance increase in the other resistance region compensate each other.
When the integrated resistor is utilized for attenuation of an alternating voltage signal, for example an audio signal, the potential difference between the resistance region and the semiconductor material therebeneath changes in accordance with the alternating potential applied to the resistance region. This effects a corresponding modulation of the space-charge region formed at the pn junction. This in turn effects modulation of the resistance value of the integrated resistor and of the voltage drop along the resistance region. When the integrated resistor is used for attenuation of an audio signal, this causes distortion with a specific distortion factor.
Reduction of this distortion factor was obtained by integrated resistors, the resistance region of which is formed by a layer of polycrystalline silicon located on an insulating layer, preferably an oxide layer, which mostly is formed on the surface of an epitaxial pocket or directly on the substrate. With variable potential difference between this resistance region and the semiconductor material located therebeneath, impairment of the integrated resistor occurs in case of such an integrated resistor as well, which in particular consists in resistance modulation in case of alternating voltages and in distortion in case of audio signals. This is due to the fact that, as a result of effects in accordance with the field strength on the bottom side of the polycrystalline resistance region directed towards the oxide layer, charge carrier concentrations result that change with the potential difference between the resistance layer and the semiconductor material located beneath the oxide. This mechanism is comparable to the effects of the gate potential of a MOS transistor on the channel region located underneath the gate oxide.
In a practical version of a conventional integrated audio circuit in which such resistors of polycrystalline silicon are used with a voltage dependency of approx. 100 ppm, audio voltage dividers with 6 db attenuation at 1 Vrms at the input of the divider obtained a distortion factor of 0.004 percent at the output of the divider. Still better results are obtained when resistors are used whose resistance region consists of an oxide-insulated silicon-chromium layer. However, the manufacture of such silicon-chromium resistors is very complex and expensive.
Although integrated resistors with resistance regions in the form of polycrystalline silicon layers or silicon-chromium layers result in lower distortion factors than integrated resistors in the form of diffused resistance regions or in the form of epitaxial resistance regions, there are applications for which a reduction in distortion factor is desired to a value that is still markedly lower than that distortion factor that can be obtained using polycrystalline and silicon-chromium resistance regions, respectively.
SUMMARY OF THE INVENTION
According to disclosed embodiments of the invention, the foregoing can be achieved by forming in the semiconductor material underneath the useful resistor region an additional auxiliary resistor region such that an equivalent voltage drop curve arises along the useful resistor region and along the auxiliary resistor region.
An integrated resistor according to disclosed embodiments of the invention comprises a useful resistor having two spaced-apart useful resistor terminal contact regions for connection of useful resistor contacts and a useful resistor region of semiconductor material located therebetween. An auxiliary resistor having two spaced-apart auxiliary resistor terminal contact regions for connection of auxiliary resistor terminal contacts and an auxiliary resistor region located therebetween is provided in the semiconductor material underneath the useful resistor region. The useful resistor region and the auxiliary resistor region are separated from each other by an electrically insulating intermediate region. The useful resistor region and the auxiliary resistor region have substantially id
Flynn Nathan
Forde Remmon R.
Jorgenson Lisa K.
SEED IP Law Group PLLC
STMicroelectronics GmbH
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