Large-volume, high-speed data processor

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G06F 1300

Patent

active

044007787

ABSTRACT:
A data processing system having an architecture that will allow high-speed direct device-to-device data transfers without the necessity of first detouring the data through a computer memory. The system consists of a host computer and a remote signal processing subsystem connected thereto. A Direct Device Access Bus and a plurality of data processing devices are provided. A controller associated with a Signal Processing Subsystem supervisor, selectively interconnects desired ones of a set of data processing devices via the Direct Device Access Bus to provide direct communication between the selected devices within a set. Several sets of devices can be serviced concurrently by the technique of dynamic time slot allocation.

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H. Buerge, "Dynamic Slot Allocation in Data Transmission Sys", IBM Tech. Disc. Bulletin, vol. 19, No. 7, 12/76.
Proceedings of the IEEE Naecon 78, pp. 114-120.

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