Large-scale semiconductor integrated circuit device and method f

Details Large-scale semiconductor integrated circuit device and method f Large-scale semiconductor integrated circuit device and method f

1994-01-12

1995-05-30

Fears, Terrell W.

Static information storage and retrieval

Addressing

365 51, 365227, G11C 1300

Patent

active

054208246

ABSTRACT:
In LSI circuit devices having a plurality of subchips packaged therein and having specific functions, capacitance cutting buffer circuits are employed in conjunction with respective terminals of the subchips, and a driver is disposed at respective points where relatively long wiring lines are respectively sub-divided into a corresponding plurality of lines. As a result, signal transmission delay can be significantly reduced. The terminals of the subchips are also provided with a probing pad to test the operations of the subchips independently of one another. The subchips employ circuit blocks which are to operate simultaneously and in conjunction with the wirings of the subchips, power supply lines are disposed correspondingly to the distributively arranged circuit blocks. Bus lines also controllably transmit addresses as well as data signals in a time sharing manner. Furthermore, each of the subchips has a fault test circuit. The subchips which have a DC fault is electrically isolated thereby allowing the remainder of the subchip to be usable. In the fault relieving technique employed, a combination of memory locations wherein no fault exists is selected for use, thereby allowing the construction of an LSI even with subchips which correspond to faulty bit addresses. The fault relieving technique employed uses an address converting circuit for faulty addresses, this operation being performed automatically within the chip system.

REFERENCES:
patent: 3736574 (1973-05-01), Gersbach
patent: 4658377 (1987-04-01), McElroy
patent: 4694428 (1987-09-01), Matsumura et al.
patent: 4752911 (1988-06-01), Prevost et al.
patent: 4954993 (1990-09-01), Yamaguchi et al.

Affiliated with

Also associated with

Rating

Large-scale semiconductor integrated circuit device and method f does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Large-scale semiconductor integrated circuit device and method f, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Large-scale semiconductor integrated circuit device and method f will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-367838