Large scale integrated circuit configured to eliminate clock sig

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307479, 3074821, H03K 19003

Patent

active

052392155

ABSTRACT:
An integrated circuit has a clock signal supply circuit positioned in a central region of the IC chip, for supplying a clock signal to each of a plurality of outer regions of the integrated circuit disposed around the central region, for thereby substantially eliminating clock signal skew effects. The clock signal may be distributed directly to circuit elements within the respective outer regions, or transferred to these circuit elements via respective buffer circuits which are formed at the centers of these regions.

REFERENCES:
patent: 4812684 (1984-03-01), Yamagiwa et al.
patent: 4839604 (1989-06-01), Tanahashi
patent: 4866310 (1989-09-01), Ando et al.
patent: 4975593 (1990-12-01), Kurakazu et al.
patent: 5013942 (1991-05-01), Nishimura et al.

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