Large packet switch router

Details Large packet switch router Large packet switch router

1998-07-30

2001-10-30

Olms, Douglas (Department: 2661)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S376000

Reexamination Certificate

active

06310878

ABSTRACT:

TECHNICAL FIELD
This invention relates to apparatus and methods for implementing a large high capacity packet switch (Router).
Problem
An Internet Protocol (IP) Router is a packet switching system which switches packets toward a destination specified by an IP header. It is desirable to have a very large router in order to switch from a large number of sources toward a large number of intermediate and final destinations in order to minimize the number of intermediate nodes through which a typical IP packet is routed. Minimizing the number of these nodes reduces the cost of a system and reduces the delay in transmitting IP datagrams (packets) from source to destination.
FIG. 1
illustrates the basic operation of prior art routers. The network access link nodes
1
provide the external input/output for the router. Each of the link nodes has local intelligence in a program controlled processor
6
, and a local routing table
5
. This table is stored in a cache. The entire routing table for the router is maintained in a centralized routing table database
4
comprising a database server
7
. The (routing) operation of this router is as follows:
1. A datagram arrives via a network interface
2
(e.g., a frame relay connection), and its IP (destination) address is searched for in the local routing table.
2. If the entry is found, the datagram is routed. Note that the outbound physical connection, which may be to the destination node or to an intermediate node, must be on the same link node.
3. If the entry is not found, the datagram's destination IP address is sent to the centralized routing table database node and a search is made there. If the link node which received the incoming datagram has a physical connection to the appropriate outbound path, the datagram's IP address is returned together with necessary routing table updating information. From now on, the updated link node will autonomously route datagrams with this same destination IP address unless this information is removed from the cache.
4. If routing information is not available, the datagram is sent to another router (the “default router”).
Solution
Applicants have recognized that the architecture shown in
FIG. 1
is fairly simple to implement, and within limits, is efficient. It has, however, some performance-rated limitations. A partial list of these limitations is the following:
1. Each link node has a limited physical addressing capability. A datagram coming in on one link node cannot be readily routed to another; although external datagram links could be incorporated, the added connectivity would soon become cost-prohibitive.
2. Under certain types of heavy load, (e.g., traffic entering a node and terminating to many random destinations), the centralized routing table database node and/ or the bus connecting it to the link nodes will become a performance bottleneck. Thus, high delays could be incurred. This type of operation would be unacceptable for real-time applications (e.g., Internet telephony).
A problem of the prior art is that there is no good architecture available for a large router.
The above problem is solved and an advance is made over the prior art in accordance with our invention wherein a “large router” is implemented by spreading the control among a plurality of routing“slices” (units); each slice is a small, stand-alone router which can either operate autonomously or cooperatively with other slices; in the latter case, taken together, the slices form a scalable router. High bandwidth interconnections available, for example, in the 5ESS Switch® manufactured by Lucent Technologies, Inc., ensure that datagrams can be readily routed between the slices; thus, a datagram entering one slice can leave on another. One way of obtaining external routing connections in a 5ESS® switch is via the TSI.
In one preferred embodiment, a plurality of routing slices together forms a routing module. In this preferred embodiment, the routing module has a single overall controller, a switching module processor. The routing slices are interconnected within a time slot interchange (TSI) unit. A plurality of modules forming a single larger router has the TSIs of the individual modules interconnected by a time multiplexed switch in a communications module. Advantageously, this arrangement allows for the flexible interconnection of a plurality of routing modules to form a very much larger router.
In accordance with one feature of Applicants' invention, individual router slices can be interconnected by a direct high speed interconnection and advantageously, such an arrangement can remove substantial load from the TSI of the interconnected slices. This feature can further be used to interconnect router slices on different switches, thus allowing a large amount of traffic to cross switch boundaries efficiently thereby making it possible for a plurality of switches to act effectively as a single large router.


REFERENCES:
patent: 5473598 (1995-12-01), Takatori et al.
patent: 5831970 (1998-11-01), Arao
patent: 6078963 (2000-06-01), Civanlar et al.

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