Excavating
Patent
1992-02-14
1996-03-26
Beausoliel, Jr., Robert W.
Excavating
371 511, 371 36, G06F 1100, G06F 1108
Patent
active
055027288
ABSTRACT:
A large, fault tolerant, highly reliable semiconductor data storage system (memory) is designed to have the memory function striped across multiple symbol planes which comprise individual fault containment regions. Each fault containment region includes such a symbol plane which, in turn, stores at least one bit of any given memory word accessed in the system. The system further includes a processing core module, including at least symbol plane addressing controls, and a channel adapter is provided for selectively connecting the memory to high speed communications channels for, in turn, communicating with client processors or other functional entities attached to the data store system. The processing core contains an error correction/detection mechanism for the error checking and correction of all data fetched from the memory and for generating error correction and detection code bits for all data to be stored in memory. The complete processing core is triplicated to form three identical processing core rails. Each rail is connected on one side to data links to all of the symbol planes, and on the other side to data links to all I/O channel link adaptors. Each symbol plane and each channel link adaptor also includes voter means for selecting a majority vote output for any communication received from the processing core rails.
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Beausoliel, Jr. Robert W.
De'cady Albert
Drumheller Ronald L.
International Business Machines - Corporation
Schlemmer Roy R.
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