Larce scale IC personalization method employing air dielectric s

Fishing – trapping – and vermin destroying

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437195, 437927, H01L 2128

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054440157

ABSTRACT:
Fabrication methods for forming a network of walls concurrently with the formation of studs for interconnecting plural device layers of a large scale integrated circuit device permits aggressive reduction of the average dielectric constant of air dielectric structures. Wall sections may be positioned to laterally support high aspect ratio connecting studs with a network of open or closed polygons. Wall patterns may also be open from layer to layer to allow formation of large scale air dielectric structures over a plurality of layers in a single material removal step. A wide range of shear strengths and reductions of average dielectric constant can be achieved even within a single device layer of a large scale integrated circuit and exploited to meet circuit design and device fabrication process requirements.

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patent: 4924289 (1990-05-01), Matsuoka
patent: 4933743 (1990-06-01), Thomas et al.
patent: 5034799 (1991-07-01), Tomita et al.
patent: 5095352 (1992-03-01), Noda et al.
IBM Technical Disclosure Bulletin; vol. 32, No. 8A, Jan. 1990; "Structure and Method For Making Multilevel Air Bridge Wiring"; p. 88. (P. 1 only).
IBM Technical Disclosure Bulletin; vol. 32, No. 5B, Oct. 1989; "Method To improve Dielectric Properties of Insulators"; p. 418 (P. 1 only).

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