Land grid array packaged device and method of forming same

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S119000, C257S723000, C257S779000, C257S781000, C257S782000, C257S783000, C257S784000

Reexamination Certificate

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10807527

ABSTRACT:
A method of packaging an integrated circuit die (12) includes the steps of providing a foil sheet (30) and forming a layer of solder (32) on a first side of the foil sheet. A first side of the integrated circuit die is attached to the solder on the foil sheet. The first side of the die has a layer of metal (34) on it and a second, opposing side of the die includes bonding pads (14). The bonding pads are electrically connected to the solder on the foil sheet with wires (16). The die, the electrical connections, and the first side of the foil sheet are encapsulated with a mold compound (20). The foil sheet is separated from the die and the wires, which forms a packaged integrated circuit (10).

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patent: 6498099 (2002-12-01), McLellan et al.
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patent: 2004/0097081 (2004-05-01), Igarashi et al.
patent: 2004/0214372 (2004-10-01), Sakamoto et al.
patent: 2005/0151235 (2005-07-01), Yokoi

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