Stock material or miscellaneous articles – Structurally defined web or sheet – Discontinuous or differential coating – impregnation or bond
Reexamination Certificate
1999-01-08
2002-04-23
Jones, Deborah (Department: 1775)
Stock material or miscellaneous articles
Structurally defined web or sheet
Discontinuous or differential coating, impregnation or bond
C428S446000, C428S447000, C428S448000, C428S450000, C428S696000
Reexamination Certificate
active
06376048
ABSTRACT:
This application is based on Japanese Patent Application No. 10-180918 filed on Jun. 26, 1998, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
a) Field of the Invention
The present invention relates to a lamination structure, a wiring structure, and a manufacture thereof, and more particularly a lamination structure having a layer whose main components are inorganic material and an organic material layer stacked upon the inorganic material layer, a wiring structure, and a manufacture thereof
b) Description of the Related Art
Reconsidering insulating materials of a multi-layer wiring structure has been scrutinized recently from the viewpoint of high integration and high speed of semiconductor devices. SiO
2
is generally used as the insulating material of semiconductor devices. A dielectric constant of SiO
2
is about 4.1 at 1 MHz. Insulating materials having a smaller dielectric constant have been desired in order to shorten a transmission delay time of a signal which transmits through a multi layer wiring structure.
Low dielectric constant materials such as SiOF have been paid much attention as alternative materials to SiO
2
. A dielectric constant of SiOF is about 3.0 at 1 MHz lower than that of SiO
2
. However, heat-resisting properties of these low dielectric constant films such as SiOF are inferior to those of an SiO
2
film.
Organic insulating films have also been paid attention as low dielectric constant materials excepting SiOF.
Tight contactness of an organic insulating film is not good relative to an inorganic insulating film, a metal film, and the like which are commonly used in a semiconductor device.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a lamination structure, a wiring structure, and a manufacture method capable of improving tight contactness between a layer whose main components are inorganic materials and an organic material.
According to one aspect of the present invention, there is provided a lamination structure comprising: a substrate having a principal surface; a first layer disposed on the principal surface; an adhesive layer disposed on the first layer, the adhesive layer being made of Si containing fluorocarbon; and a second layer disposed on the adhesive layer, wherein one of the first and second layers is made of a material selected from a group consisting of a material whose main component is Si containing inorganic material, a metal, and an inorganic metal compound, and another is made of an organic insulating film.
Tight contactness of the second layer to the underlying layer surface can be improved by inserting the adhesive layer between the first and second layers.
According to another aspect of the present invention, there is provided a wiring structure comprising: a substrate having a principal surface and a conductive region formed in a partial area of the principal surface; a first interlayer insulating film formed on the substrate; a first adhesive layer formed on the first interlayer insulating film, the first adhesive layer being made of Si containing fluorocarbon; a contact hole formed through the first adhesive layer and the first interlayer insulating film, the contact hole having as a bottom at least a partial area of the conductive region; a second interlayer insulating film formed on the first adhesive layer, the second interlayer insulating film being made of organic insulating material; a wiring trench formed through the second interlayer insulating film and partially overlapping the contact hole; and a wiring pattern completely burying the contact hole and the wiring trench and connected to the conductive region.
Tight contactness of the second interlayer insulating film to the underlying layer surface can be improved by disposing the first adhesive layer under the second interlayer insulating film. The second interlayer insulating film in which the wiring pattern is embedded is made of organic insulating material. If the organic insulating material having a low dielectric constant is used, the parasitic capacitance between lines of the wiring pattern can be made small and a signal transmission delay time can be shortened.
According to another aspect of the present invention, there is provided a method of forming a wiring structure comprising the steps of: preparing a substrate having a principal surface and a conductive region formed in a partial area of the principal surface; forming a first interlayer insulating film on the substrate; forming a first adhesive layer on the first interlayer insulating film, the first adhesive layer being made of Si containing fluorocarbon; forming an opening through the first adhesive layer in an area corresponding to the conductive region; etching the first interlayer insulating film to form a contact hole corresponding to the opening, by using the first adhesive layer as an etching mask; burying the contact hole with conductive material to form a conductive plug connected to the conductive region; forming a second interlayer insulating film on the first adhesive layer, the second interlayer insulating film being made of organic insulating material; and forming a wiring trench through the second interlayer insulating film and burying the wiring trench with conductive material to form a wiring pattern.
Tight contactness of the second interlayer insulating film to the underlying layer surface can be improved by disposing the first adhesive layer under the second interlayer insulating film. The second interlayer insulating film in which the wiring pattern is embedded is made of organic insulating material. If the organic insulating material having a low dielectric constant is used, the parasitic capacitance between lines of the wiring pattern can be made small and a signal transmission delay time can be shortened.
REFERENCES:
patent: 6037274 (2000-03-01), Kudo et al.
patent: 6071830 (2000-06-01), Matsuzawa et al.
patent: 4-329638 (1992-11-01), None
patent: 9-232303 (1997-09-01), None
patent: 410284476 (1998-10-01), None
Armstrong Westerman Hattori McLeland & Naughton LLP
Fujitsu Limited
Jones Deborah
Stein Stephen
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