Lamination process and structure of high layout density...

Details Lamination process and structure of high layout density... Lamination process and structure of high layout density...

2005-07-05

2005-07-05

Lam, Cathy F (Department: 1775)

Stock material or miscellaneous articles

Structurally defined web or sheet

Discontinuous or differential coating, impregnation or bond

C428S901000, C174S255000, C257S635000, C257S637000, C257S642000

Reexamination Certificate

active

06913814

ABSTRACT:
A lamination process and structure of a high layout density substrate is disclosed. The lamination process comprises the following steps. First of all, a plurality of laminating layers are individually formed, wherein each laminating layer has a first dielectric layer, a plurality of first vias and a patterned conducting layer. Next, a bottom layer having a second dielectric layer and a plurality of second vias is formed. Then, the laminating layers and the bottom layer are stacked. Finally, the laminating layers and the bottom layer are laminated simultaneously to form a multiplayer substrate at one time.

REFERENCES:
patent: 5451721 (1995-09-01), Tsukada et al.
patent: 5744758 (1998-04-01), Takenouchi et al.
patent: 6207259 (2001-03-01), Iino et al.
patent: 6228467 (2001-05-01), Taniguchi et al.
patent: 6530147 (2003-03-01), Haas et al.
patent: 6764748 (2004-07-01), Farquhar et al.

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