Laminated SOI substrate and producing method thereof

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate

Reexamination Certificate

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C438S455000, C438S977000

Reexamination Certificate

active

06323109

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a laminated SOI (Silicon On Insulator) substrate for use in forming a semiconductor device and a producing method thereof, and more particularly, to a laminated SOI substrate in which the adverse influence, on a device, of defects in the substrate is reduced, and a producing method thereof.
2. Description of the Related Art
As a method for producing a super thin film SOI substrate by a lamination technique, there is known a smart-cut process utilizing a phenomenon that a semiconductor substrate is cleaved through voids formed by charging a large amount of hydrogen (Proceedings 1996 IEEE International SOI conference, p152).
FIGS. 1A
to
1
E are sectional views sequentially showing a producing method of the SOI substrate by the conventional smart-cut process.
In the producing method of the SOI substrate according to the conventional smart-cut process, silicon dioxide film
22
which is an insulation is first formed on a single crystal silicon substrate
21
as shown in
FIG. 1A. A
surface area of the single crystal silicon substrate
21
ultimately will be a device forming area. On the surface area, oxygen deposition or crystal defect region
28
such as nucleus of the oxygen deposition which is called a grown-in defect as a general term exists.
Next, as shown in
FIG. 1B
, hydrogen ion is ion implanted from a surface of the silicon dioxide film
22
in a dose amount of about 10
16
to 10
17
(atoms/cm
2
). As a result, a hydrogen implanted region
23
is formed in the single crystal silicon substrate
21
.
Then, as shown in
FIG. 1C
, a surface of the silicon dioxide film
22
and a surface of another single crystal silicon substrate
25
are laminated at room temperature, and are subjected to a thermal treatment at 400 to 500° C., thereby forming voids
24
in the hydrogen implanted region
23
.
At that time, as shown in
FIG. 1D
, the single crystal silicon substrate
21
is cleaved through the voids
24
formed in the hydrogen implanted region
23
.
Next, a thermal treatment at about 1,000° C. or higher is carried out for several hours to strongly adhere the laminated surfaces of the silicon dioxide film
22
and the single crystal silicon substrate
25
. Then, a surface of the cleaved single crystal silicon substrate
21
is polished to form a mirror surface to complete the SOI substrate.
Then, the SOI substrate produced in this marier is advanced to a device forming step.
However, in the laminated SOI substrate produced by the above-described conventional method, there are problems that particles are generated in the device produced using the SOI substrate, or bonding leakage, element separation characteristic and tolerance voltage of gate insulation film are deteriorated.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a laminated SOI substrate and a producing method thereof in which the adverse influence, on a device, of defects in the substrate can be reduced and a yield can be enhanced.
A laminated SOI substrate according to the present invention comprises a first single crystal silicon substrate and a second single crystal silicon substrate laminated on each other with an insulation film interposed therebetween. In the laminated SOI substrate, the first single crystal silicon substrate has one kind of substrate selected from a group consisting of a hydrogen anneal substrate, an intrinsic gettering substrate and an epitaxial substrate.
In the present invention, hydrogen anneal substrate, intrinsic gettering substrate or epitaxial substrate is used as the first single crystal silicon substrate on which a device is to be formed. Since crystal defects on a surface area of these substrates are extremely few, voids are suppressed from being formed in the substrate during the producing process. Therefore, it is possible to reduce the adverse influence, on a device, of defects in the substrate.
A producing method of a laminated SOI substrate according to the present invention comprises the steps of: forming an insulation film on a surface of a first single crystal silicon substrate; forming a hydrogen implantation region in the first single crystal silicon substrate by carrying out hydrogen implantation from a surface of the insulation film; and laminating the surface of the insulation film and a surface of a second single crystal silicon substrate. In this producing method of the laminated SOI substrate, the first single crystal silicon substrate has one kind of substrate selected from a group consisting of a hydrogen anneal substrate, an intrinsic gettering substrate and an epitaxial substrate.
In the producing method of the laminated SOI substrate according to the present invention, the first single crystal silicon substrate includes a crystal defect region at a certain depth from a surface thereof.
In the present invention, since the first single crystal silicon substrate includes the crystal defect region at a certain depth from a surface thereof, if the hydrogen implantation is carried out, hydrogen is concentrated on the crystal defect region to form the voids for cleaving the substrate. That is, since voids are not formed in other regions, it is possible to reduce the adverse influence, on a device, of defects in the substrate.
The crystal defect region may include at least one kind of crystal defect selected from a group of misfit dislocation and oxygen deposition.
Further, in the present invention, a thermal treatment at a temperature of 1,000° or higher may be carried out after the step of laminating the surface of the insulation film and a surface of a second single crystal silicon substrate.
The misfit dislocation may be generated by forming, on a third single crystal silicon substrate, a single crystal silicon layer having a resistance higher than that of the third single crystal silicon substrate by epitaxial growth.
In order to solve the above problems, the present inventors repeated experiments, and as a result, they found that since the crystal defect region
28
(see
FIG. 1A
) existed irregularly in the single crystal silicon substrate
21
used in the conventional method, voids
24
a
were formed also in the crystal defect region
28
by the hydrogen implantation as shown in
FIG. 1C
, and the voids
24
a
remained in the single crystal silicon substrate
21
which is an active layer of the SOI substrate as shown in FIG.
1
E and therefore, an adverse influence was exerted on a device produced from this SOI substrate. That is, in the producing method of the laminated SOI substrate by the smart-cut process, it is important to control the location where the voids are formed by the hydrogen implantation. The location where the voids are formed should be a location spaced from a surface where the hydrogen is implanted by a distance corresponding to a range of the hydrogen. However, if there is a region around such a location where hydrogen ion such as defect is prone to concentrate, voids may be formed in such a region. Thereupon, it is necessary to control the crystallinity on the surface of the basic single crystal silicon substrate. In the present invention, the location where the voids are formed in controlled by improving the crystallinity on the surface of the basic single crystal silicon substrate.
With this feature, according to the present invention, the voids are formed in a predetermined location in the semiconductor silicon substrate, and the semiconductor silicon substrate is cleaved in the location where the voids are formed and therefore, remaining voids can be reduced. Thus, the adverse influence, on a device, of defects in the substrate can be reduced and yield can be enhanced.


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patent: 5374564 (1994-12-01), Bruel
patent: 5476813 (1995-12-01), Naruse
patent: 5633174 (1997-05-01), Li
patent: 5710057 (1998-01-01), Kenney
patent: 5714395 (1998-02-01), Bruel
patent: 5854123 (1998-12-01), Sato et al.
patent: 5877070 (1999-03-01), Goesele et al.
patent: 5882987 (1999-03-01),

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