Laminated multiple substrates

Details Laminated multiple substrates Laminated multiple substrates

2007-10-16

2007-10-16

Trinh, Minh (Department: 3729)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S700000, C029S830000

Reexamination Certificate

active

10828178

ABSTRACT:
The present invention is for laminated and interconnected multiple substrates forming a multilayer package or other circuit component. A solder bump may be situated on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates pressed together via the adhesive films are mechanically bonded. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.

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Deepak K. Pai, “An Approach to Fabricate High Density, Large-Layer-Count PWB,” presented at the Printed Circuits Expo 2000, Apr. 2-6, 2000, San Diego, California, pp. S09-2-1 to S09-2-4.
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