Laminated mounting structure and memory card

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Reexamination Certificate

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Details

C257S724000, C257S730000, C257SE23063

Reexamination Certificate

active

07875974

ABSTRACT:
To provide a stacked mounting structure in which the number of semiconductor chips that can be stacked is greater than conventionally, as well as a method for fabricating the same, each semiconductor chip has electrodes provided at least at one end in the stacked mounting structure, and a board holding the semiconductor chips at the one end is folded with at least two of the semiconductor chips being stacked so as to at least partially overlap with each other.

REFERENCES:
patent: 6172418 (2001-01-01), Iwase
patent: 2007/0035002 (2007-02-01), Moto et al.
patent: 2008/0192423 (2008-08-01), Nagai et al.
patent: 09-199665 (1997-07-01), None
patent: 2001-217388 (2001-08-01), None
patent: 2002-207986 (2002-07-01), None

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