Laminated chip electronic device and method of manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S762000, C257S766000, C257S528000, C257S532000, C257S778000, C336S096000

Reexamination Certificate

active

06965167

ABSTRACT:
The present invention discloses a laminated chip electronic device and a method of manufacturing the same. In the laminated chip electronic device and the method of manufacturing the same according to the present invention, a body is made of a non-linear resistance coefficient material and has a plurality of conductive layers formed therein; an insulating layer is formed on the top, bottom, front and back surfaces of the body; and two electrodes are formed at the two ends of the body and electrically connected to the terminals of the conductive layers, respectively. Furthermore, in the present invention, two soldered interface layers are formed on the two electrodes, respectively.

REFERENCES:
patent: 4490706 (1984-12-01), Satou et al.
patent: 4525921 (1985-07-01), Carson et al.

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