Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2000-09-25
2003-07-22
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C361S763000, C361S821000, C257S691000, C257S670000
Reexamination Certificate
active
06597056
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a laminated chip component comprising alternately laminated conductive patterns, and insulating sheets, the conductive patterns between the insulating sheets being connected by conductors in through-holes, and a method for manufacturing the laminated chip component.
2. Description of the Related Art
An inductance element such as that shown in
FIG. 7
is a conventional laminated chip component of this type. The inductance element of
FIG. 7
comprises conductive patterns
73
a,
73
b,
73
c
and
73
d
which are printed on the top faces of insulating sheets
71
a,
71
b,
71
c
and
71
d.
The insulating sheets
71
a,
71
b,
71
c
and
71
d
are laminated sequentially and covered with protective insulating sheet
71
e.
As shown in
FIG. 8
, the upper layer and lower layer conductive patterns
73
a,
73
b,
73
c
and
73
d
are connected together by conductors
74
which are provided in through-holes
72
. These conductive patterns form a spiral coil pattern. The conductive patterns
73
a
and
73
d
are extracted at the end faces of the laminated body, and connect to terminals which are provided at the end faces of the laminated body.
Another conventional laminated chip component comprises a circuit formed by laminating together passive elements such as coils, capacitors, and the like.
FIGS. 9 and 10
show a filter which is formed by laminating two coils and capacitors. An insulating sheet
91
a
having a conductive pattern for capacitor
95
a
printed thereon is laminated with an insulating sheet
91
b
having conductive patterns for capacitor
95
b
and
95
c
printed thereon, thereby forming two capacitors. Insulating sheets
91
c,
91
d
and
91
e
having two conductive patterns for half-turn coil printed thereon and a protective insulating sheet
91
f
are laminated sequentially on the laminated body which contains the capacitors. The conductive patterns for coil
93
a,
93
b
and
93
c
are connected by a conductor
94
provided in a through-hole
92
. The conductive patterns for coil
93
d,
93
e
and
93
f
are connected by a conductor
94
provided in a through-hole
92
. The conductive patterns for coil form two coils inside the laminated body.
The conductive pattern for coil
93
a
and the conductive pattern for capacitor
95
b
are connected by a conductor
94
provided in a through-hole
92
. The conductive pattern for coil
93
d
and the conductive pattern for capacitor
95
c
are connected by a conductor provided in a through-hole
92
.
The conductive pattern for coil
93
c
and the conductive pattern for coil
93
f
are extracted at two sides of the laminated body, and connect to terminals. The conductive pattern for capacitor
95
a
is extracted at the sides where the conductive patterns for coil are not extracted, and connects to terminals.
In conventional laminated chip components such as that shown in
FIGS. 7 and 8
, the firing shrinkage rate of the conductive patterns is greater than the firing shrinkage rate of the insulating sheets. Consequently, the connection in the through-holes is sometimes broken, as shown by numeral
80
in FIG.
8
.
In conventional laminated chip components such as that shown in
FIGS. 9 and 10
, different materials are generally used for the conductive patterns for coil and the conductive patterns for capacitor. As a result, the two types of conductive patterns have different firing shrinkage rates and different reactivity. Consequently, in conventional laminated chip components such as that shown in
FIGS. 9 and 10
, not only is the firing shrinkage rate of the conductive patterns greater than the firing shrinkage rate of the insulating sheets, but in addition, the two types of conductive patterns have different firing shrinkage rates and different reactivity. As a consequence, the connection in the through-holes in liable to break, especially between a coil and a capacitor as shown by numeral
100
in FIG.
10
.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a laminated chip component in which broken connections in through-holes of insulating sheets can be prevented.
In order to achieve the abovementioned object, this invention is featured by a laminated chip component including: alternately laminated conductive patterns and insulating sheets; through-holes which are provided in the insulating sheets; auxiliary conductive patterns which are provided on the top faces of positions which facing the through-holes provided in adjacent insulating sheets of the conductive patterns; and conductors which are provided in the through-holes, and connect upper layer conductive patterns to the auxiliary conductive pattern on lower layer conductive patterns.
This invention is also featured by a laminated chip component including: alternately laminated conductive patterns and insulating sheets; through-holes which are provided in the insulating sheets; conductor sections which are provided in the insulating sheets at positions facing the through-holes provided in adjacent insulating sheets; and conductors which are provided in the conductor sections and the through-holes and connect upper layer conductive patterns to lower layer conduction patterns.
This invention is further featured by a laminated chip component including: alternately laminated conductive patterns and insulating sheets; through-holes which are provided in the insulating sheets; said conductive pattern comprising a first conductive pattern and a second conductive pattern of different materials; auxiliary conductive pattern of the same material as said second conductive pattern, provided on the top faces at the connection section which connect to said second conductive pattern of said first conductive pattern; and a conductor of the same material as said second conductive pattern, provided in a through-hole which runs between said first conductive pattern and said second conductive pattern.
This invention is still further featured by a laminated chip component including: alternately laminated conductive patterns and insulating sheets; through-holes which are provided in the insulating sheets; said conductive pattern comprising a first conductive pattern and a second conductive pattern of different materials; the insulating sheet on which said first conductive pattern is provided comprising a conductor section for providing a conductor of the same material as said second a conductive pattern, the conductor section being provided at position which corresponding to the connection between said first and second conductive patterns in said insulating sheet; and conductors comprising the same material as said second conductive pattern, the conductors being provided in a through-hole which runs between said first conductive pattern and said second conductive pattern.
This invention is still further featured by a method for manufacturing a laminated chip component comprising alternately laminated conductive patterns and insulating sheets, through-holes which are provided in said insulating sheets, the method comprising the steps of: printing conductive patterns on said insulating sheets; printing auxiliary conductive patterns on the top faces of said conductive patterns at positions facing said through-holes of adjacent insulating sheets; and connecting an upper layer conductive pattern to said auxiliary conductive pattern on a lower layer conductive pattern by means of conductors which are provided in the through-holes in said insulating sheets.
This invention is still further featured by a method for manufacturing a laminated chip component comprising alternately laminated conductive patterns and insulating sheets, through-holes which are provided in said insulating sheets, the method comprising the steps of: printing a first conductive pattern on an insulating sheet; printing an auxiliary conductive pattern comprising the same material as the second conductive pattern on the top face at the connection section which connects to said second conductive pattern of sai
Muramatsu Nobuaki
Ogawa Takahiro
Andújar Leonardo
Flynn Nathan J.
Toko Kabushiki Kaisha
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