Laminate type varistor

Electrical resistors – Resistance value responsive to a condition – Current and/or voltage

Reexamination Certificate

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Details

C338S020000, C338S204000, C338S314000

Reexamination Certificate

active

06346871

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a laminate type varistor adapted for being incorporated into a small-capacitance high-frequency circuit, or the like.
2. Description of the Related Art
Conventionally, as shown in
FIG. 5
, a laminate type varistor is configured in the following manner. That is, at least two inner electrodes
20
a
and
20
b
making a pair to each other and a varistor layer
21
are laminated. Ceramic layers
22
and
23
are provided as outermost layers for protecting the laminate. The inner electrodes
20
a
and
20
b
are electrically connected to outer electrodes
24
and
25
respectively. The varistor layer
21
has a dielectric constant. The inner electrodes
20
a
and
20
b
are formed to have surfaces W facing each other through the varistor layer
22
(Unexamined Japanese Patent Publication (kokai) Nos. Hei. 5-6806 and Hei. 5-6807).
Similarly, conventionally, also in the case where pairs of inner electrodes
30
a,
30
b;
31
a,
31
b;
. . . are provided in a laminate type varistor as shown in FIG.
6
. The laminate type varistor is configured in the following manner. That is, the inner electrodes
30
a,
30
b;
31
a,
31
b;
. . . are formed so that the inner electrodes have surfaces W facing each other through varistor layers
32
a,
32
b
. . . respectively. Protection ceramic layers
33
and
34
are provided as outermost layers. The inner electrodes
30
a,
30
b;
31
a,
31
b;
. . . are electrically connected to outer electrodes
35
and
36
respectively (Unexamined Japanese Patent Publication (kokai) Nos. Hei. 5-283208 and Hei. 8-55710).
In the laminate type varistor configured as described above, the capacitance increases as the facing surfaces W of the inner electrodes
20
a,
20
b,
30
a,
30
b,
31
a,
31
b
. . . increase in terms of areas. However, if the capacitance is large, a high-frequency signal may be passed through the varistor or the waveform of the signal may be distorted in the case where the varistor is used in a high-frequency circuit. To prevent this problem, it is necessary to set the capacitance to a value of about several tens of pF. In the aforementioned configuration, however, it is difficult to set the capacitance to a value of about several tens of Pf.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a laminate type varistor in which capacitance can be set to a small value while a varistor voltage is kept in a value equivalent to that of a conventional varistor.
A laminate type varistor according to the present invention comprises at least one pair of first and second inner electrodes; a varistor layer, the at least one pair of first and second electrodes and the varistor layer being laminated; and a first outer electrode and a second outer electrode electrically connected to the first inner electrode and a second inner electrode, respectively, wherein the first inner electrode and the first inner electrode are separated by a predetermined distance from the outer electrode so that the first inner electrode has no electrode surface facing to an electrode surface of the second inner electrode.
A laminate type varistor according to the present invention comprises: a ceramic sintered body comprising at least one pair of first and second inner electrodes; a varistor layer, the at least one pair of first and second electrodes and the varistor layer being laminated; and protection ceramic layers as outermost layers of the ceramic sintered body; and a first outer electrode and a second outer electrode electrically connected to the first inner electrode and a second inner electrode, respectively; wherein a width of the ceramic sintered body is equal to or longer than the sum of the lengths of the first and second inner electrodes.


REFERENCES:
patent: 4729058 (1988-03-01), Gupta et al.
patent: 5034709 (1991-07-01), Azumi et al.
patent: 5155464 (1992-10-01), Cowman et al.
patent: 5245309 (1993-09-01), Kawase et al.
patent: 5324986 (1994-06-01), Ueno et al.
patent: 6008717 (1999-12-01), Kawase et al.
patent: 6087923 (2000-07-01), Ahn et al.
patent: 5-6806 (1993-01-01), None
patent: 5-6807 (1993-01-01), None
patent: 5-283208 (1993-10-01), None
patent: 6-13206 (1994-01-01), None
patent: 7235406 (1995-09-01), None
patent: 8-55710 (1996-02-01), None
U.S. application No. 09/017,229, filed Feb. 2, 1998.
U.S. application No. 09/215,134, filed Dec. 18, 1998.
Patent Abstracts of Japan, vol. 017, No. 261 (E-1369), May 21, 1993, JP 05 006806, Jan. 14, 1993.

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