Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
1998-11-18
2001-02-27
Gandhi, Jayprakash N. (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
76, 76, C174S250000, C257S669000, C257S724000, C156S578000
Reexamination Certificate
active
06195264
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to the field of substrates on which electronic devices are mounted and, in particular, to a laminate substrate which includes a laminate layer and a stiffener attached to the laminate layer.
BACKGROUND OF THE INVENTION
Laminate substrates are generally made from any of a variety of epoxy-based resin materials, and are used for printed circuit boards, cards, semiconductor chip modules, and the like. Electronic devices, such as semiconductors, are mounted and electrically coupled to such laminate substrates using a variety of techniques known in the art, such as wire bonding or solder bumps.
Certain electronic devices and applications require the laminate substrate to be stiffened, especially if the laminate substrate is relatively thin or flexible, such as a “thin-light card (TLC).” Cavity-type laminate substrates are often constructed with stiffeners. Such cavity-type substrates generally have a planar, laminate layer with a cavity or aperture defined in the laminate layer and a stiffener made of a sheet of copper adhered to the bottom surface of the laminate layer. A portion of the surface of the copper stiffener spans the aperture in the laminate layer and thus is accessible for further processing. For example, the stiffener serves not only to strengthen the overall card structure, but, as discussed further below, may also act as one or more of a ground plane, mounting surface, and heat dissipation layer.
An electronic device, generally a semiconductor chip or die, is positioned on the exposed portion of the copper stiffener within the area defined by the inside edge of the aperture. For purposes of this document, the terms semiconductor device, chip, and die are used interchangeably. The copper stiffener acts as a heat sink for the semiconductor chip mounted on the stiffener. Wire bonds extend from pads at or near the inside edge of the aperture to opposing areas on the chip, thereby forming electrical connections between the chip and any circuits patterned in the substrate.
The size of the aperture in cavity-type substrates is usually selected to be close to, but slightly larger than, the outer dimension or perimeter of the electronic device destined to be placed in the aperture. This arrangement has the advantage of minimizing the distance through which the wire bonds extend, that is, the distance between the inside edge of the aperture and the locations on the chip to which the wire bonds attach. Shorter wire-bond lengths are generally desirable because they enhance the electrical connection to the chip, the reliability of the associated package, and the yield.
It is also important for the chip to be seated evenly on, and generally flush against, the underlying stiffener. If portions of the chip are separated from the copper stiffener, then the ability of the stiffener to dissipate heat from the chip is reduced, causing the chip potentially to overheat and eventually fail prematurely. Furthermore, an unevenly seated chip is more likely to crack in response to thermal stress. Uneven seating of the chip also may adversely affect the proper functioning of the conductive paths between the chip, the wire bonds, and the circuitry of the laminate substrate.
One of the challenges inherent to cavity circuit board products is joining the copper stiffener properly to the corresponding surface of the circuit board with just the right amount of adhesive at the optimal locations. In general, too much adhesive in the wrong places compromises the performance of the semiconductor mounted on the resulting laminate substrate. Too little adhesive compromises the structural integrity of the substrate.
It is in meeting this challenge that the prior art has often been wanting. Prior art techniques have generally involved interposing adhesive in the form of liquid or paste epoxy between the mating surfaces, having the adhesive flow when the surfaces are brought together, and allowing the adhesive to cure to form the required bond. This technique has several drawbacks and disadvantages. The mating surfaces are generally “roughened” to promote a strong bond. Thus, if too little adhesive is used, there will be insufficient adhesive flow over the “roughened” surfaces, resulting in a poor bond. In turn, a poor bond may compromise the structural integrity of the resulting laminate substrate.
Furthermore, because wire bonds are attached at or near the inner edge of the aperture in the laminate layer, it is usually important to have this inner edge area well adhered to the underlying copper stiffener. Too little adhesive in this area, or too little flow to the area, will often cause the inner edge of the aperture to be separated from the underlying copper stiffener. Such separation creates catch points in which contaminants may collect. Because the wire bonds attach to the substrate near these catch points, the presence of contaminant in close proximity to the wire bonds risks compromising the performance of the chip mounted to the substrate.
Any gaps between the inner edge of the aperture and the copper stiffener may also entrap air bubbles during or after the chip and substrate are covered with dielectric encapsulant. The presence of air bubbles during or after encapsulation may interfere with the ability of the encapsulant to remain bonded to the substrate or otherwise inhibit its proper functioning.
In addition, when separated from the copper stiffener, the inner edge of the laminate layer forms an undesirable, cantilevered structure. Because the laminate layer is somewhat flexible, its cantilevered edge acts like a diving board when orthogonal forces are applied to it. Wire bonding operations at the edge of the aperture often involve orthogonal forces; therefore, this “diving board” effect may interfere with successful wire-bonding at the inner edge of the aperture.
Although too little adhesive is undesirable, as explained in the above discussion, simply supplying an abundance of adhesive generates its own problems. Too much adhesive, and correspondingly too much adhesive flow, generally causes adhesive to be deposited or “squeezed out” from between the mating surfaces of the stiffener and the laminate layer and into the cavity of the substrate. The presence of such adhesive in the cavity prevents the chip from lying flat and in substantial contact with the underlying stiffener. As discussed above, not only does such non-flush mounting of the chip reduce thermal conductivity to the stiffener, but it also may interfere with optimal wire bond connections to the chip. This problem is compounded by the fact that, for optimal chip performance, the inner edge of the aperture is located as close as possible to the opposing outer edge of the chip placed in the aperture. Thus, even relatively slight amounts of “bleeding” into the cavity from the mating surfaces are likely to interfere with flush mounting and centering of the chip.
One attempted solution of the prior art is to simply avoid placing adhesive at locations on either the stiffener or the laminate layer which are near the inner edge of the aperture. As discussed above, however, the need to wire bond at the inner edge, and the need to avoid undesirable catch points and cantilevering, require adhesion at these locations.
Another general solution is to apply adhesive in quantities and at locations which compensate for the anticipated distance through which the adhesive will flow. In practice, however, it is difficult to predict and model the distances through which adhesive will flow. It is correspondingly difficult to control the flow process to avoid having adhesive deposited on the surface destined to receive the chip.
A related approach to controlling adhesive flow is to screen the epoxy paste onto the surface of the TLC (thin-light card) and laminate it to the copper stiffener. The screening technique allows for uniform coverage of the TLC, but the epoxy must still be in a state to flow on the “roughened ” surfaces and form a good bond. The variability of such flow still risks the screene
Lauffer John M.
Marcello Heike
Russell David J.
Gandhi Jayprakash N.
International Business Machines - Corporation
Pivnichney John R.
Ratner & Prestia
LandOfFree
Laminate substrate having joining layer of photoimageable... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Laminate substrate having joining layer of photoimageable..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Laminate substrate having joining layer of photoimageable... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2596209