Ladderless true flash analog-to-digital converter with automatic

Coded data generation or conversion – Converter calibration or testing

Patent

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Details

341159, 341118, H03M 110

Patent

active

052144305

ABSTRACT:
The true flash analog-to-digital converter has an extremely high speed and resolution. The complexity of the comparators is reduced to an absolute minimum, i.e. one or two transistors, preferably FETs. A reference ladder, e.g. resistor network, is completely eliminated. No matching is necessary. 8-bit converter breaking 1 GHz barrier is possible.
The input signal or a reference signal is selectively applied to comparators and compared against base signals stored in capacitors. An encoder is coupled to the comparators for producing the output code. A reference circuit provides the reference signal and a reference code corresponding thereto. A digital comparator compares the code produced by the encoder against the reference code and provides a corrective signal. A demultiplexer applies the corrective signal to one of the capacitors in response to the reference code.

REFERENCES:
patent: 3961325 (1976-06-01), Kendall et al.
patent: 4345241 (1982-08-01), Takeuchi et al.
patent: 4547763 (1985-10-01), Flamm
patent: 4639715 (1987-01-01), Doluca
patent: 4794374 (1988-12-01), Koike

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