Heating – Accessory means for holding – shielding or supporting work... – Support structure for heat treating ceramics
Reexamination Certificate
2000-07-28
2002-03-26
Wilson, Gregory (Department: 3749)
Heating
Accessory means for holding, shielding or supporting work...
Support structure for heat treating ceramics
C211S041180
Reexamination Certificate
active
06361313
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the manufacture of semiconductor integrated circuits (ICs) and more particularly to an improved ladder boat which supports the semiconductor wafers for processing.
BACKGROUND OF THE INVENTION
Processing of semiconductor wafers (hereinafter called “wafers”) includes a number of heat treatments at elevated temperatures to diffuse dopants, to deposit oxide layers and so on. Vertical furnaces are extensively used for conducting heat treatments during so-called “hot” processes which include low pressure chemical vapor deposition (LPCVD), atmospheric oxidation (ATM) and anneal steps. A vertical heat treatment furnace includes a ladder boat to hold the wafers that are disposed horizontally and spaced from another in the vertical direction. The wafers can be automatically loaded and unloaded in and out of the heat treatment furnace by the transfer fork of a robot.
FIG. 1
, comprises of
FIGS. 1A and 1B
, which schematically show the top view and the cross-sectional view (taken along line AA of
FIG. 1A
) of a conventional ladder boat referenced
10
, currently used in standard LPCVD furnaces. It is important to point out that the illustrations are not necessarily drawn to scale. Now turning to
FIG. 1
, as known for those skilled in the art, the ladder boat
10
, comprises a top plate
11
A and a bottom plate
11
B, vertically opposing each other, six rectangular-shaped support rods
12
(the number can vary between four and six) are provided between the top and bottom plates. Grooves or slots are formed at equal distance in the support rods
12
, by a grinding machine as standard that define lodgments to receive the silicon wafers
14
. As a result, protrusions commonly referred to as dividers referenced
13
, are created and they will support the silicon wafers
14
, at their peripheral surface. As apparent in
FIG. 1
, dividers
13
, have the general shape of squared teeth (although rounded teeth are also commonly used in the semiconductor industry). Plates
11
A and
11
B, are typically made of solar glass, while support rods
12
, are made of quartz ware. Wafers
14
, are separated in the vertical direction by a distance (labeled P in
FIG. 1
) referred to as the “pitch” in the technical literature. Typically, the capacity of such a conventional ladder boat is of 160 wafers with a pitch P of about 0.14 inch for a VTR 7000+ reactor (SVG-THERMCO, San Jose, Calif., USA) or 170 wafers with a pitch of 0.2 inch for a TEL ALPHA8 reactor (Tokyo Electron Limited, Tokyo, Japan).
It is important to notice that with this type of ladder boat
10
, the contact zone between a wafer
14
, and each of the dividers
13
, supporting it, is a surface referenced S in
FIG. 1
, substantially a square in the present case. Typically, the value of contact surface S is about 6 mm
2
. In addition, because the ladder boat
10
, is provided with six support rods
12
, the total contact surface which is equal to 6×S (i.e. 36 mm
2
) can be relatively important.
Because monocrystalline silicon (the base material of semiconductor wafers) has a melting point of 1410° C., crystalline defects tend to take place in vicinities of parts of the silicon wafers
14
, supported by the support rods
12
, at contact surface S, locations during standard heat treatments that are conducted at 1000° C. and above. These defects form the well known “slip lines” or “microscratches” which can be seen either by visual inspection or using magnifying lenses. It is widely admitted in the semiconductor industry that the origin of these microscratches comes from the fact that the wafers are supported at their periphery at a limited number of positions (six in the present case), so that large internal stresses take place in the wafer that are relieved by slip line formation. On the other hand, silicon and quartz particles collectively referred to as chipping particles can be found in vicinities of these contact surface S, locations as a result of mechanical friction.
In addition, each contact surface S, generates a cold zone on the wafer active surface which creates a substantial degradation of the thickness uniformity and contamination, of the deposited layer.
Finally, because LPCVD reactors include a vacuum system, the microscratches and chipping particles generation phenomena is increased by the vibrations caused by the pump. To solve this specific problem of vibrations, different ladder boat designs have been proposed so far. For example, the so-called “ring boat” wherein the wafers are not supported by dividers in grooves of the support rods, rings instead are supported in the grooves and wafers held directly thereon. The peripheral edges of the wafers contact the rings and internal stresses are mitigated, reducing thereby the occurrence of micro-scratches. However, ring boats are difficult to fabricate and rather expensive. Moreover, the contact surface is too important because it is equal to the whole ring surface.
All these drawbacks are also valid for thermal oxidation and anneal steps that are performed at the atmospheric pressure, except the vibrations because no vacuum system is used in this case.
The presence of micro-scratches and chipping particles at the wafer backside is also critical later on in the wafer manufacturing process, because it generates defocused chip images during different photolithography steps (mainly at the deep trench and gate conductor formation) that are subsequently performed. The roughness of the wafer backside surface is locally so modified that it becomes impossible to keep all the wafer in the focus plan of the photolithography tool during its exposition to UV light creating thereby photolithography defects necessitating a rework step as it will be discussed in more details later on. Such a reworking operation substantially increases the wafer processing costs.
In addition, most of photolithography tools are provided with a vacuum operated chuck used to support and firmly hold the wafer during exposure to light. Moreover, the wafer is strongly distorted by the vacuum system to put the entire wafer in the focus plan the most accurately possible. The distortion force is strong enough to crash particles at the wafer backside which sometimes remain on the chuck. In this case, even if we have now to process a wafer having a clean backside, some photolithography defects are created during exposure of the clean wafer by a phenomena of backside cross-contamination. For 300 mm wafer processing, the distortion force applied to them becomes stronger and the probability to let crashed particles on the chuck significantly increases. As a consequence of this contamination, the photolithography tool must be stopped and the specific cleaning procedure recommended by the tool manufacturer is undertaken before the tool becomes operative again in the manufacturing line.
Faced to this acute problem of microscratches and chipping particles, semiconductor manufacturers have developed a number of wafer cleaning procedures that are performed after each LPCVD/ATM process to get a clean wafer backside in order to prevent the contamination of photolithography tool chucks. Currently, the preferred wafer backside cleaning process is done using an AS2000 cleaning tool (Dai Nippon Screen, Kyoto, Japan) which performs an efficient cleaning of both the active and backside faces of the wafer (including the edge) with DI water.
These micro-scratches and chipping particles defects at the wafer backside can induce up to 5% manufacturing yield loss per exposed wafer which is not negligible. Today, they are removed by a step of reworking the wafer to remove the deposited photoresist mask. Such additional operation of reworking which affect the manufacturing line throughput and the photolithography tool up-time is considered as a major problem by the IC manufacturer. As a matter of fact, photolithography is recognized to be certainly one of the most important step in IC manufacturing to date. No doubt that continuous progresses in this field in the last decad
Beyaert Olivier
Mazur Jean-Pierre
Raffin Patrick
Rodier Francis
Pepper Margaret A.
Wilson Gregory
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