Keepers for MRAM electrodes

Semiconductor device manufacturing: process – Having magnetic or ferroelectric component

Reexamination Certificate

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C438S692000, C257S326000

Reexamination Certificate

active

06413788

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention is directed generally to magnetic memory devices for storing digital information and, more particularly, to methods and structures for confining magnetic fields produced by these devices.
2. Description of the Related Art
The digital memory most commonly used in computers and computer system components is the dynamic random access memory (DRAM), wherein voltage stored in capacitors represents digital bits of information. Electric power must be supplied to these memories to maintain the information because, without frequent refresh cycles, the stored charge in the capacitors dissipates, and the information is lost. Memories that require constant power are known as volatile memories.
Non-volatile memories do not need refresh cycles to preserve their stored information, so they consume less power than volatile memories. There are many applications where non-volatile memories are preferred or required, such as in cell phones or in control systems of automobiles.
Magnetic random access memories (MRAMs) are non-volatile memories. Digital bits of information are stored as alternative directions of magnetization in a magnetic storage element or cell. The storage elements may be simple, thin ferromagnetic films or more complex layered magnetic thin-film structures, such as tunneling magnetoresistance (TMR) or giant magnetoresistance (GMR) elements.
Memory array structures are formed generally of a first set of parallel conductive lines covered by an insulating layer, over which lies a second set of parallel conductive lines, perpendicular to the first lines. Either of these sets of conductive lines can be the bit lines and the other the word lines. In the simplest configuration the magnetic storage cells are sandwiched between the bit lines and the word lines at their intersections. More complicated structures with transistor or diode configurations can also be used. When current flows through a bit line or a word line, generates a magnetic field around the line. The arrays are designed so that each conductive line supplies only part of the field needed to reverse the magnetization of the storage cells. Switching occurs only at those intersections where both word and bit lines are carrying current. Neither line by itself can switch a bit; only those cells addressed by both bit and word lines can be switched.
Magnetic memory arrays can be fabricated as part of integrated circuits (ICs) using thin film technology. As for any IC device, it is important to use as little space as possible. But as packing density is increased, there are tradeoffs to be considered. When the memory cell size is reduced, the magnetic field required to write to the cell is increased, making it more difficult for the bit to be written. When the width and thickness of bit lines and word lines are reduced, there is higher current density, which can cause electro-migration problems in the conductors. Additionally, as conducting lines are made closer together, the possibility of cross talk between a conducting line and a cell adjacent to the addressed cell is increased. If this happens repeatedly, the stored magnetic field of the adjacent cell is eroded through magnetic domain creep, and the information in the cell can be rendered unreadable.
In order to avoid affecting cells adjacent to the ones addressed, the fields associated with the bit and word lines must be strongly localized. Some schemes to localize magnetic fields arising from conducting lines have been taught in the prior art.
In U.S. Pat. No. 5,039,655, Pisharody taught a method of magnetically shielding conductive lines in a thin-film magnetic array memory on three sides with a superconducting film. At or near liquid nitrogen temperatures (i.e., below the superconducting transition temperature), superconducting materials exhibit the Meissner effect, in which perfect conductors cannot be permeated by an applied magnetic field. While this is effective in preventing the magnetic flux of the conductive line from reaching adjacent cells, its usefulness is limited to those applications where very low temperatures can be maintained.
In U.S. Pat. No. 5,956,267, herein referred to as the '267 patent, Hurst et al. taught a method of localizing the magnetic flux of a bottom electrode for a magnetoresistive memory by use of a magnetic keeper. A layered stack comprising barrier layer/soft magnetic material layer/barrier layer was deposited as a partial or full lining along a damascene trench in a insulating layer. Conductive material was deposited over the lining to fill the trench. Excess conductive material and lining layers that were on or extended above the insulating layer were removed by polishing. Thus, the keeper material lined bottom and side surfaces of the bottom conductor, leaving the top surface of the conductor, facing the bit, free of the keeper material.
The process of the '267 patent aids in confining the magnetic field of the cell and avoiding cross-talk among bits. A need exists, however, for further improvements in lowering the writing current for a given magnetic field. By lowering the current required to write to a given cell, reliability of the cell is improved.
SUMMARY OF THE INVENTION
A magnetic memory array, preferably comprising an MRAM, with a series of top electrodes in contact with a magnetic keeper on at least one surface, a series of bottom electrodes and magnetic bit regions located therebetween is described in accordance with the current invention. The magnetic bit regions may comprise tunneling magnetoresistance or giant magnetoresistance structures.
In an MRAM device, the structure of a magnetic keeper for the top conductor made by a damascene process includes stacked layers of barrier and magnetic materials, at least a portion of the layers magnetically shielding at least one surface of the top conductor.
A method of forming a magnetic keeper for a top electrode in an MRAM device is also described, which includes depositing an insulating layer over a magnetic storage element, etching and then filling a damascene trench with a conductive material, planarizing to remove the conductive material from over the insulating layer and then depositing a magnetic material over the conductive material.


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Pohm et al., “The Architecture of a High Performance Mass Store with GMR Memory Cells,”IEEE Transactions on Magnetics, vol. 31, No. 6, Nov. 1995.
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