Junction-side illuminated silicon detector arrays

Radiant energy – Invisible radiant energy responsive electric signalling – Semiconductor system

Reexamination Certificate

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C250S370140, C257S438000

Reexamination Certificate

active

06713768

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to radiation detectors and more specifically, to a structure of and a method for fabricating pixelated silicon detector arrays and photodetector arrays.
BACKGROUND OF THE INVENTION
Many applications can benefit from a development of advanced pixelated silicon detector arrays with superior characteristics for dark leakage current, quantum efficiency, and production yields. One such application involves silicon photodetector arrays that can be used to construct gamma-ray cameras with very high resolution.
Highly pixelated silicon photodetector arrays coupled to closely matched parallel piped CsI(Tl) scintillator arrays are a known basis for solid state gamma-ray cameras capable of imaging a wide variety of subjects ranging from small animals in the laboratory to whole human bodies. One example of silicon photodetector arrays for radiation imaging is disclosed in U.S. Pat. No. 5,773,829 entitled “Radiation Imaging Detector,” issued Jun. 30, 1998 to Iwanczyk and Patt, which is hereby incorporated by reference in full.
Large-sized solid state gamma-ray cameras employing such radiation imaging detectors typically require low cost and high-yield semiconductor photodetector array structures with superior performance and competitive prices compared to those of the existing clinical systems for Single Photon Emission Computed Tomography (SPECT) which utilize known vacuum Photomultiplier Tube (PMT) technologies.
Other broad applications including radiation hardened detector arrays for high-energy physics research would also benefit from a development of low cost, high-yield detector array structures.
Typical silicon photodiode arrays with parallel signal readout are based on (p+)−(n)−(n+) structures constructed on high resistivity (1-100 ohm-m) silicon wafers. P+ contacts forming junctions in the n-type substrate are constructed in the form of a diode array. A common n+ contact forms an ohmic contact, and is used as an entrance window (light sensitive window).
Structures wherein the n+ (ohmic) contact is used as the entrance window for light, x-rays, gamma rays, or particles, and in which the p+ (junction) contacts are used as the readout are referred to as back-side illuminated photodiodes or back-illuminated photodiodes, the junction-side commonly being referred to as the front-side. Such back-side illuminated diode arrays are known, and are described in a paper entitled “Development of Low Noise, Back-Side Illuminated Silicon Photodiode Arrays,” by S. E. Holland, N. W. Wang, and W. W. Moses published in IEEE Transactions on Nuclear Science Vol.44 No.3 1997.
In the back-side illuminated photodiodes, the (p+)−(n) junction array, which is created on the non-light sensitive side of the chip, is generally used only for signal readout and therefore can usually be bonded directly to the readout chip or circuitry without obstructing the light from a scintillator. The opposite side (ohmic side) is typically coupled to the scintillator for light detection. This type of array typically operates only in fully depleted mode, which usually requires reverse bias of more than 70 V for the standard 50 ohm-m resistivity silicon or higher biases for lower resistivity material.
In order to achieve stable I-V characteristic and a low reverse current value, each of the p+ pixels typically incorporates a field plate and surrounding guard rings to optimize the potential distribution around the pixel and to drain out the surface leakage current. These structures typically suffer from the following shortcomings:
1. The requirement of high light sensitivity at the ohmic contact conflicts with the technological requirements for effective gettering of the bulk material necessary for maintaining long life times of minority carriers. For effective gettering of the detector bulk, high concentrations of phosphorus dopant and a relatively large thickness of doped material is required in the n+ contact. On the other hand, in order to ensure high light sensitivity, the contact has to be made as thin as possible with an optimized doping profile. Thinning of the contact is at the cost of the gettering process, and it usually causes an increase in the dark leakage current in the constructed arrays;
2. In the known back-side illuminated structures, in order to achieve full depletion at low bias voltages and to reduce the bulk generation current component, designers favor the use of very thin wafers. However, this creates technological problems due to the lack of mechanical strength of the thin silicon material;
3. Reduction of the surface leakage current is usually achieved by constructing a field plate structure at the periphery of individual pixels. However, this is known to lead to generation of defects at the interface between SiO
2
and Si in the field plate. These defects typically are a source of excess reverse current. Some reduction of the defect density can usually be achieved by use of costly high purity processes and materials;
4. For low leakage operation, the back-side illuminated structures generally require guard ring structures typically surrounding each individual pixel, and at least surrounding small groups (32 to 64) of pixels. These guard ring structures require additional physical space between the pixels and create problems in building high-density arrays or mosaics of such arrays.
SUMMARY OF THE INVENTION
In one embodiment according to the present invention, detector array is formed on a semiconductor material having a first side and a second side. The detector array includes an entrance window formed on the first side. The entrance window is used to receive radiation. The detector array also includes an array of detectors formed on the second side. One or more of the detectors are used for detecting the radiation received via the entrance window. The entrance window forms a junction with the semiconductor material, and the detectors include pixelated ohmic contacts.
In another embodiment according to the present invention, a method of forming a detector array on a semiconductor material having a first side and a second side is provided. An entrance window is formed on the first side. The entrance window is used for receiving radiation. An array of detectors is formed on the second side. One or more of the detectors are used for detecting the radiation received via the entrance window. The entrance window forms a junction with the semiconductor material, and the detectors include pixelated ohmic contacts.
In yet another embodiment of the present invention, a composite detector array includes multiple detector arrays.
In still another embodiment of the present invention, a detector array is formed on a semiconductor material having a first side and a second side. The detector array includes entrance window means formed on the first side. The entrance window means is used for receiving radiation. The detector array also includes an array of detector means formed on the second side. One or more of the detector means are used for detecting the radiation received via the entrance window means. The entrance window means form a junction with the semiconductor material, and the detector means include pixelated ohmic contacts.


REFERENCES:
patent: 5021854 (1991-06-01), Huth
patent: 5757057 (1998-05-01), Dabrowski
patent: 5773829 (1998-06-01), Iwanczyk et al.
patent: 6025585 (2000-02-01), Holland
patent: 6172370 (2001-01-01), Liao et al.
Holland, S.E., et al., “Development of Low Noise, Back-Side Illuminated Silicon Photodiode Arrays,” IEEE Transactions on Nuclear Science, vol. 44, No. 3, pp. 443-447, Jun. 1997.

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