Junction member comprising junction pads arranged in matrix...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257S723000, C257S777000, C257SE23070, C257SE23175

Reexamination Certificate

active

08044518

ABSTRACT:
A second semiconductor chip and a junction member are mounted on a first semiconductor chip formed with a plurality of first pads on a surface thereof. A resin encapsulating body is provided which seals the first semiconductor chip, the second semiconductor chip and the junction member. The second semiconductor chip includes a plurality of second pads arranged in a central part thereof. The junction member includes first junction pads, second junction pads and connecting portions which connect the first junction pads and the second junction pads respectively. Electrical connections of the second semiconductor chip from the second pads include connections to connecting terminals and connections to the connecting terminals or the first semiconductor chip from the second junction pads via the first junction pads.

REFERENCES:
patent: 5354955 (1994-10-01), Gregor et al.
patent: 6278616 (2001-08-01), Gelsomini et al.
patent: 6351040 (2002-02-01), Schoenfeld
patent: 6392950 (2002-05-01), Ayukawa et al.
patent: 6421254 (2002-07-01), Crane et al.
patent: 6552418 (2003-04-01), Misumi et al.
patent: 6916686 (2005-07-01), Wada et al.
patent: 6979905 (2005-12-01), Nishida et al.
patent: 7098528 (2006-08-01), Vasishta et al.
patent: 2003/0153122 (2003-08-01), Brooks
patent: 07-050315 (1995-02-01), None
patent: 08-288453 (1996-11-01), None
patent: 2001-177050 (2001-06-01), None
patent: 2001-344967 (2001-12-01), None
patent: 2002-93993 (2002-03-01), None
patent: 2003-234359 (2003-08-01), None
English-Language Machine Translation of JP 2001-177050. Retreived Sep. 29, 2008 from JPO webpage.

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