Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device
Reexamination Certificate
2001-11-21
2003-04-01
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
C257S219000
Reexamination Certificate
active
06541804
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention lies in the integrated technology field. More specifically, the invention relates to a junction-isolated lateral MOSFET for a high-/low-side switch having a semiconductor body of the first conductivity type having two main surfaces that are essentially opposite one another, wherein case, from the first main surface, a source zone and a drain zone each having the second conductivity type extend at a distance from one another into the semiconductor body, the drain zone and the source zone are surrounded at their outer periphery by a region of the first conductivity type, an insulating layer with a gate electrode is provided on the first main surface in the region between the source zone and the drain zone, and the semiconductor body is grounded on the second main surface.
High-voltage (HV) MOSFETs are widely used in bridge circuits in order to switch relatively small voltages of the order of magnitude of 50 to 100 V or else higher voltages in the circuits. Such HV MOSFETs should be easily integrable and, at the same time, be distinguished by a simple construction. Precisely in the application in bridge circuits, by way of example, an integrated inverse diode should not be necessary for operation of the HV MOSFET.
Therefore, the use of a junction-isolated lateral MOSFET as a switch in bridge circuits has already been described. However, it has not been possible hitherto to configure such a junction-isolated lateral MOSFET in such a way that it can also be used for higher voltages in excess of about 50 to 100 V and, at the same time, can be integrated simply and without a high outlay.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a junction isolated lateral MOSFET for high/low side switches, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which can also be used for voltages in excess of 50 to 100 V and is distinguished by a simple structure, so that it can be fabricated without a high outlay.
With the foregoing and other objects in view there is provided, in accordance with the invention, a junction-isolated lateral MOSFET for a high-/low-side switch, comprising:
a semiconductor body of the first conductivity type;
a first main surface and a second main surface substantially opposite the first main surface;
a source zone and a drain zone each of a second conductivity type extending from the first main surface at a distance from one another into the semiconductor body;
a surrounding region of the first conductivity type surrounding the drain zone and the source zone at an outer periphery thereof;
an insulating layer and a gate electrode disposed on the first main surface in a region between the source zone and the drain zone;
a ground connection grounding the semiconductor body at the second main surface;
a region of the first conductivity type extending between the source zone and the drain zone from the first main surface into the semiconductor body, the region of the first conductivity type having a doping concentration between a doping concentration for a breakdown charge and twice the doping concentration for the breakdown charge.
In other words, a junction-isolated lateral MOSFET for high-/low-side switches of the above-mentioned type is provided, between the source zone and the drain zone, with a region of the first conductivity type that extends from the first main surface as far as the semiconductor body.
This region of the first conductivity type preferably has a doping concentration N
p1
, where:
N
DB
<N
p1
<2
·N
DB
where N
DB
denotes the doping concentration for breakdown charge and is approximately 2·10
12
carriers cm
−2
for silicon.
In accordance with an added feature of the invention, pillar-shaped regions of the first conductivity type extend from the first main surface to the semiconductor body and are embedded in the source zone and the drain zone. That is, it is advantageous that pillar-like regions of the first conductivity type which extend from the first main surface as far as the semiconductor body are incorporated in the source zone and the drain zone. In this case, these pillar-like regions are distributed more or less periodically, the total quantity of the charges in these pillar-like regions and in the source zone and, respectively, in the drain zone being approximately identical in each case.
In accordance with an alternative feature of the invention, pillar-shaped regions of the first conductivity type extend parallel to the first and second main surfaces and they are embedded in the source zone and the drain zone. That is, it is also possible for pillar-like regions of the first conductivity type which extend parallel to the two main surfaces to be incorporated in the source zone and the drain zone. In this case, for the total quantity of the respective dopings, the same holds true as was explained above for the pillar-like regions which extend between the first main surface and the semiconductor body.
In accordance with a concomitant feature of the invention, field plates are provided for the source zone and/or the drain zone. That is, it is also advantageous if the source zone and/or the drain zone are/is provided with field plates. The breakdown strength of the junction-isolated lateral MOSFET can thereby be improved.
The pillar-like regions, when arranged perpendicularly to the main surfaces and when arranged parallel to the latter, act as compensation charge in each case, so that a higher doping of the opposite conductivity type is allowed around these regions. Thus, by way of example, if the semiconductor body is p-conducting, then the source zone and the drain zone are n-conducting, and the region of the first conductivity type between the source zone and the drain zone is p-conducting. Pillar-like p-conducting regions are then incorporated in the source zone and the drain zone, which regions act as compensation charge and thus enable a higher n-doping of the source zone and drain zone.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a junction-isolated lateral MOSFET for high-/low-side switches, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
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Published International Application No. 97/296518 (Tihanyi et al.), dated Aug. 14, 1997.
“M.O.S. technologies for smart power and high-voltage circuits”, Pierre Rossel, L'Onde Electrique, Nov. 1987, Vo. 67, No. 6, pp. 58-69.
Cao Phat X.
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Stemer Werner H.
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