Junction gated field effect transistor

Details Junction gated field effect transistor Junction gated field effect transistor

1975-01-27

1976-09-21

Lynch, Michael J.

357 20, 357 36, 357 55, H01L 2980

Patent

active

039822648

ABSTRACT:
A junction gated field effect transistor having a substrate providing a drain region of low impurity concentration, a mosaic shaped gate region of high impurity concentration formed on the drain region, a corresponding mosaic shaped insulating layer overlying said mosaic shaped gate region but having windows therein smaller than the windows of the gate region, the windows of the insulating layer being aligned with the windows of the gate region, a gate electrode connected to said mosaic shaped gate region, a plurality of source regions of high impurity concentration formed on the substrate in the openings of the mesh forming the insulating layer, and a conductive plate source electrode overlying said insulating layer and in contact with said source regions.

REFERENCES:
patent: 3767982 (1973-10-01), Teszner et al.
A. Morgan et al., "A Proposed Vert. Chan. Var. Res. Fet," Proc. IEEE, vol. 59, No. 5, May 1971, pp. 805-807.

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