Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
2001-06-22
2004-02-17
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S192000, C257S263000, C257S270000, C257S273000, C257S287000
Reexamination Certificate
active
06693314
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a junction field-effect transistor containing at least a gate electrode, a semiconductor region having at least a drain contact region disposed on a first surface of the semiconductor region and formed of a first conductivity type, a control region formed of a second conductivity type and an inner region formed of the first conductivity type. The transistor further has a source contact region formed of the first conductivity type, the control region and the inner region being at least partly disposed between the source contact region and the drain contact region.
Such a junction field-effect transistor is disclosed in International Patent Disclosures WO 97/23911 A1 and WO 98/49733 A1. Each of the two documents describes a normally on junction field-effect transistor (JFET) which can be used to control a current flow between two electrodes. In particular, with the aid of the JFET, the current is switched on and off or else limited to a maximum value. On the other hand, the JFET is able to take up the reverse voltage of more than 1000 V that arises in the reverse-biasing situation. Owing to the high breakdown strength of silicon carbide (SiC) the JFET is preferably composed of corresponding monocrystalline semiconductor material. The JFET contains a buried island region that functions as a control region and effects field shielding of one electrode.
In a unipolar transistor, such as the JFET, the dielectric strength is determined inter alia by the doping of an inner region that carries a large part of the reverse voltage in the reverse-biasing situation and carries the current in the forward-biasing situation. The inner region is also referred to as a drift zone. The higher the values that are to be assumed by the reverse voltage to be carried, the lower the doping of the inner regions must be chosen. On the other hand, in order to ensure, in the forward-biasing situation, that current is transported through the inner region in a manner as free from losses as possible, the doping should, by contrast, be as high as possible.
The contrary effects described mean, for example, that a power transistor realized in silicon, such as e.g. a voltage-controlled Si-MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or else an Si-JFET, is usually realized only for a maximum reverse voltage of a few 100 V. When the doping is configured for a higher reverse voltage, the static on-state losses and, consequently, the risk of disruption of the transistor through overheating greatly rise.
Furthermore, German Patent DE 43 09 764 C2 (which corresponds to U.S. Pat. No. 5,438,215) discloses a normally off power MOSFET which can block a voltage of more than 1000 V. In order to reduce the forward resistance in the MOSFET, additional p-doped and n-doped zones are provided in the inner region, the zones having a higher doping concentration than the inner region. This results in suitability for a high reverse voltage in conjunction with low static on-state losses. In this case, the configuration features specified can only relate to a MOSFET. This is because, in contrast to a JFET, a MOSFET always requires a control oxide in order to influence the current flow. The specific properties of the control oxide, in particular the maximum permissible field strength, likewise have an influence on the maximum possible reverse voltage. In the MOSFET configuration, therefore, care must also be taken to ensure that impermissibly high field spikes are not produced in the control oxide in the reverse-biasing situation. This occasionally has the effect that the material properties of the semiconductor material can only be utilized in part, on account of the stipulations necessitated by the control oxide.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a junction field-effect transistor with a more highly doped connecting region that overcomes the above-mentioned disadvantages of the prior art devices of this general type. The invention specifies a power transistor that is at the same time suitable for a high reverse voltage and, in addition, has low static losses in the forward-biasing situation. Furthermore, the intention is for the power transistor to manage without a control oxide.
With the foregoing and other objects in view there is provided, in accordance with the invention, a junction field-effect transistor. The JFET contains a semiconductor region having a first surface and a second surface opposite the first surface. The semiconductor region includes a drain contact region disposed at the first surface of the semiconductor region and formed of a first conductivity type; an inner region disposed above the drain contact region and formed of the first conductivity type; and a control region disposed above the inner region and formed of a second conductivity type. A gate electrode is disposed above the control region.
A source contact region is provided and is formed of the first conductivity type. The control region and the inner region are at least partly disposed between the source contact region and the drain contact region. A first connection region formed of the first conductivity type is provided. The first connection region has at least one inner part running within the semiconductor region substantially perpendicularly to the first surface. The first connection region is directly connected to the source contact region in a low-impedance manner and is doped more highly than the inner region. A second connection region formed of the second conductivity type and having at least one inner part running within the semiconductor region substantially perpendicularly to the first surface, is provided. The second connection region compensates for an influence of the first connection region in a reverse-biasing situation.
In this case, the invention is based on the insight that the bulk resistance in the inner region of the junction field-effect transistor (JFET) can be reduced by at least a first connecting region doped more highly than the inner region. The first connecting region has the same conductivity type as the inner region and it extends at least partly into the region of the JFET through which a current flows in the forward-biasing situation. In order to obtain the longest possible current path with a low bulk resistance, the first connecting region is directly connected to the source contact region. In this case, the connection is effected with a low impedance. For the current flowing between the source contact region and the drain contact region in the forward-biasing situation, this results in a path having distinctly lower losses than in the case of a current flow via the more lightly doped inner region.
In the reverse-biasing situation, a lower dielectric strength of the first connecting region, which is caused by the higher doping is nevertheless not realized. This is because the influence of the first connecting region is at least partly compensated for by the second connecting region having the second conductivity type. At a high reverse voltage, there are practically no longer any free charge carriers present in the inner parts of the first and second connecting regions. This is because they are completely depleted above a specific value of the reverse voltage, with the result that only the space charges remain. As a result, the equipotential lines of the electric field, above the reverse voltage value, run practically parallel to the first surface through the semiconductor region. Thus, an electric field distribution is established as if the connecting regions were actually not present. Consequently, reverse-biasing behavior of the JFET is not impaired by the above-described measure for reducing the bulk resistance in the forward-biasing situation. The maximum reverse voltage that can be carried by the JFET is determined according to the doping of the inner region, exactly as in the case of the prior art.
In the JFET, the current flow is controlled through at least one depletion l
Mitlehner Heinz
Stephani Dietrich
Tihanyi Jenoe
Greenberg Laurence A.
Locher Ralph E.
SiCed Electronics Development GmbH & Co. KG
Soward Ida M.
Stemer Werner H.
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