Junction field effect transistor with bipolar device and method

Details Junction field effect transistor with bipolar device and method Junction field effect transistor with bipolar device and method

1991-02-13

1991-11-26

Prenty, Mark

357 16, 357 63, 357 22, 357 34, H01L 2702, H01L 29161, H01L 29167

Patent

active

050687050

ABSTRACT:
Vertical AlGaAs heterojunction bipolar transistors and GaAs junction field effect transistors are fabricated on a single gallium arsenide (GaAs) substrate to form an integrated circuit structure. The integration of these devices is made possible by a novel method of fabricating heterojunction inverted transistor integrated logic (HI2L) transistors with emitter reigons on the bottom (contacted through the substrate) while simultaneously forming the JFET structure with no additional processing steps. An ion implant technique is employed which uses an acceptor material to create a P type region, boron or protons to create insulating regions, and silicon or selenium to create an N type region. A zinc diffusion is used to form the bipolar P type ohmic contact regions and JFET gate regions in one operation. Bipolar collector and JFET source and drain metallization patterns are formed simultaneously followed by the simultaneous formation of bipolar base and JFET metallization patterns. Threshold voltages may be controlled by adjusting the zinc diffusion depth. The combination of bipolar and field effect devices on the single substrate allows the optimization of speed and power dissipation in large scale gallium arsenide integrated circuits.

REFERENCES:
patent: H000291 (1987-06-01), Boos
patent: 3576475 (1974-04-01), Kronlage
patent: 4573064 (1986-02-01), McLevige et al.
patent: 4739386 (1988-04-01), Tanizawa
patent: 4801987 (1989-01-01), Otsubo et al.
patent: 4821090 (1989-04-01), Yokoyama

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