Patent
1990-10-24
1992-10-27
Hille, Rolf
357 16, 357 234, 357 49, H01L 29161, H01L 2910, H01L 2712
Patent
active
051594145
ABSTRACT:
A junction field effect transistor includes a semiconductor body having a surface, relatively heavily doped source and drain regions of a first conductivity type disposed in the semiconductor body spaced from each other and reaching the surface, a channel layer of the first conductivity type disposed within the semiconductor body extending between and electrically connecting the source and drain regions, a gate region of a second conductivity type disposed within the semiconductor body extending from the surface to the channel layer and forming a rectifying junction with the channel layer, a relatively high resistivity region disposed within the semiconductor body between the surface and the channel layer, extending between the source and drain regions and surrounding the gate region, and source, gate, and drain electrodes disposed on the surface in contact with the source, gate, and drain regions, respectively.
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Akinwande, "Towards VLSI GaAs Heterostructure FET Integrated Circuits", 1989 IEEE, pp. 97-100.
Mishra et al, "Novel High Performance--Self-Aligned 0.15 Micron Long T-Gate AlInAs-GaInAs HEMTs", 1989 IEEE, pp. 101-104.
Tang et al; "GaAs Gate Field-Effect Transistor Fabrication"; Feb. 9, 1985; IBM Technical Disclosure; 5064-5066.
Kasahara et al; "Fully Ion-Implanted GaAs IC's Using Normally-Off JFETs"; Aug. 20, 1981; Electronics Letters; vol. 17; No. 7.
Izumi Sigekazu
Nagahama Kohki
Fahmy Wael
Hille Rolf
Mitsubishi Denki & Kabushiki Kaisha
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