Junction field effect thin film transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

Reexamination Certificate

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Details

C257S134000, C257S272000, C257S256000, C257S504000, C257SE29057, C257SE29059

Reexamination Certificate

active

07491987

ABSTRACT:
Example embodiments are directed to a junction field effect thin film transistor (JFETFT) including a first electrode formed on a substrate, a first conductive first gate semiconductor pattern formed on the first gate electrode, a second conductive semiconductor channel layer formed on the substrate and the first conductive first gate semiconductor pattern, and source and drain electrodes formed on the second conductive semiconductor pattern and located at both sides of the first conductive gate semiconductor pattern. The JFETFT may further include a first conductive second gate semiconductor pattern formed on a portion of the second conductive semiconductor channel layer between the source electrode and the drain electrode, and a second gate electrode formed on the first conductive second gate semiconductor pattern.

REFERENCES:
patent: 5357127 (1994-10-01), Park et al.
patent: 5459343 (1995-10-01), Seymour et al.
patent: 2004/0023432 (2004-02-01), Haga
patent: 2004/0155846 (2004-08-01), Hoffman et al.
patent: 2006/0194500 (2006-08-01), Ishii
patent: 2006/0226443 (2006-10-01), Ryu et al.
patent: 09191017 (1997-07-01), None
Caputo et al., Low Pinch-Off Voltage Amorphous Silicon Junction Field-Effect transistor: Experiment and Simulation, IEEE Trans. Elcn. Device, vol. 50, No. 6, p. 1559-1561, Jun. 2003.

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