Josephson junction latch circuit

Details Josephson junction latch circuit Josephson junction latch circuit

1982-02-16

1985-02-26

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307306, 307462, 357 5, H03K 300, H03K 338

Patent

active

045019754

ABSTRACT:
A Josephson junction latch circuit is provided which has an AND gate having plural inputs and a single output. The output of the single AND gate is directly coupled to a Josephson junction flux storage loop capable of storing flux indicative of the output of the AND gate. A Josephson junction sense line is provided capable of sensing the flux condition of the flux storage loop. The sense line is directly coupled to amplifying gates which produce amplified true and complement quantities whenever the sense line is actuated.

REFERENCES:
patent: 3879715 (1975-04-01), Zappe
patent: 4413196 (1983-11-01), Josephs et al.
patent: 4413197 (1983-11-01), Josephs et al.
Herrell, "Josephson Multivibrator and Monostable Circuits," IBM Technical Disclosure Bulletin, vol. 17, No. 10, Mar. 1975, pp. 3082-3083.
Jutzi, "An Inductively Coupled Memory Cell for NDRO With Two Josephson Junctions," Cryogenics, Feb. 1976, pp. 81-88.
Beresford, "Josephson Chip has 177-Device Circuit," Electronics, vol. 55, No. 3, Feb. 1982, pp. 38-39.
Wang et al., "High Gain, Wide Margin Josephson Junction OR and AND Gates," Inter. Electron Device Meeting, Dec. 1981, Washington, D.C., pp. 118-121.

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