Josephson integrated circuit having an output interface capable

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307480, 3642391, 3642706, 505829, 505859, H03K 19195, H03K 1920

Patent

active

051265982

ABSTRACT:
A Josephson integrated circuit includes a Josephson logic processor operated at a first clock rate, and a latch circuit formed of Josephson devices operated at the first clock rate for receiving output data from the Josephson processor together with a status signal for holding the output data. The latch circuit is supplied with a clear signal for resetting the output data therefrom. In addition, the invention includes therefrom a data output circuit formed of Josephson devices operated in response to a second clock rate that is slower than the first clock rate, wherein the data output circuit has an output terminal and supplied with the output data held in the latch means for passing the output data to the output terminal at the second clock rate. Further, the data output means produces the clear signal at the second clock rate.

REFERENCES:
patent: 4367420 (1983-01-01), Foss et al.
patent: 4501975 (1985-02-01), Josephs et al.
patent: 4633439 (1986-12-01), Harada et al.
Kotani et al., IEEE ISSOC 90, pp. 148-286, 1986.
Fujimaki et al., IEEE Transactions on Electron Devices, vol. 36, No. 2, Feb. 1989.
Ohara et al., ISEC'90, Extended Abstract.

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