Jittery polyphase clock

Details Jittery polyphase clock Jittery polyphase clock

2005-01-25

2005-01-25

Nguyen, Linh My (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S293000

Reexamination Certificate

active

06847247

ABSTRACT:
A plurality of clock signal phases are distributed to a circuit and at least one jitter source is coupled between at least two selected clock phases of the plurality of clock signal phases to introduce a jitter between at least the selected two clock signal phases. In a specific embodiment, the clock distribution system provides N clock phases and, if the phases have an order, there is one jitter source provided between each of the first N−1 phases and the following phase, so that each phase has a jitter relative to each other phase. Several implementations are possible for the jitter sources, which can be noise sources or pseudo-random noise sources, depending on which is easier to design and implement in a specific clock distribution system.

REFERENCES:
patent: 4554465 (1985-11-01), Koike
patent: 5652733 (1997-07-01), Chen et al.
patent: 6304125 (2001-10-01), Sutherland

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