Jitter suppressing circuit

Pulse or digital communications – Receivers – Amplitude modulation

Patent

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Details

375324, 375332, 375371, 329304, H03D 300

Patent

active

059563745

ABSTRACT:
A jitter suppressing circuit is provided for suppressing jitter generated in a multistate quadrature amplitude modulation type modulator or demodulator. Based on I- and Q-phase signals containing jitter, a signal point specified by the I- and Q-phase signals is obtained, and a phase difference between the signal point and an ideal signal point closest thereto is detected. Whether the ideal signal point belongs to a predetermined signal point group is then determined. When the result of determination is affirmative, the phase of the signal point specified by the I- and Q-phase signals containing jitter is corrected, on the basis of the detected phase difference.

REFERENCES:
patent: 5115454 (1992-05-01), Kucar
patent: 5579351 (1996-11-01), Kim
patent: 5661761 (1997-08-01), Iwamatsu

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