Jitter estimation in phase-locked loops

Details Jitter estimation in phase-locked loops Jitter estimation in phase-locked loops

2011-02-15

2011-02-15

Raymond, Edward (Department: 2857)

Data processing: measuring, calibrating, or testing

Measurement system in a specific environment

Electrical signal parameter measurement system

Reexamination Certificate

active

07890279

ABSTRACT:
A phase-locked loop is characterized by analyzing phase noise in its output signal while known levels of input phase noise are provided. The resulting data provides intrinsic phase noise and gain of the phase-locked loop. These values provide a general relationship between input phase noise and output phase noise for the phase-locked loop, which allows estimation of output phase noise corresponding to a given level of input phase noise, and allows estimation of input phase noise corresponding to a given level of output phase noise.

REFERENCES:
patent: 2006/0141963 (2006-06-01), Maxim et al.
Chow et al., “A Jitter Estimation Method for Cascaded, Programmable Phase-Locked Loops.”DesignCon 2008. Feb. 2008.
Daniel Chow, “Analysis of Crosstalk Effects on Jitter in Transceivers.”DesignCon 2008. Feb. 2008.

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