Jitter estimating apparatus and estimating method

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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C702S066000, C375S359000, C324S622000

Reexamination Certificate

active

06990417

ABSTRACT:
There is provided a jitter estimating apparatus for calculating phase noise waveform of an input signal and for estimating a peak value, a peak-to-peak value and a worst value of jitter of the input signal, and probability to generate jitter based on the phase noise waveform. Timing jitter sequence, period jitter sequence, and cycle to cycle period jitter sequence of the input signal are calculated and the peak value and the peak to peak value for each jitter, as well as probability to generate jitter may be estimated.

REFERENCES:
patent: 6756818 (2004-06-01), Liu et al.
patent: 6781534 (2004-08-01), Karlquist
patent: 7-218565 (1995-08-01), None
patent: 8-226946 (1996-09-01), None
Patent Abstracts of Japan, Publication No. 08-226946, Date of Publication Sep. 3, 1996, 2 pages.
Patent Abstracts of Japan, Publication No. 07-218565, Date of Publication Aug. 18, 1995, 2 pages.
Takahiro Yamaguchi, Tohoku Daigaku Dentsu Danwakai Kiroku, (1999), vol. 68, No.1, 11 pages.
Takahiro Yamaguchi, Masahiro Ishida, Probo (1999), No. 15, 10 pages.

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