Jitter correction

Details Jitter correction Jitter correction

2007-12-26

2009-08-18

Young, Brian (Department: 2819)

Coded data generation or conversion

Converter compensation

C341S155000

Reexamination Certificate

active

07576666

ABSTRACT:
A system comprising includes a clock generator module, an analog-to-digital converter (ADC), and a correction module. The clock generator module receives a system clock and generates a digital clock that is derived from the system clock, wherein the digital clock has an average frequency. The clock generator module generates a deviation indication that indicates a deviation of the digital clock from an ideal clock of the average frequency. The ADC receives an analog signal, receives the digital clock, and generates a first stream of values by sampling the analog signal at intervals based on the digital clock. The correction module receives the first stream of values and generates a second stream of values that are corrected based on the deviation indication.

REFERENCES:
patent: 6097879 (2000-08-01), Komatsu et al.
patent: 6593871 (2003-07-01), Miethig et al.
patent: 7262723 (2007-08-01), Straussnig et al.

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