Pulse or digital communications – Receivers – Interference or noise reduction
Patent
1996-05-10
1998-05-19
Chin, Stephen
Pulse or digital communications
Receivers
Interference or noise reduction
329320, H04B 110
Patent
active
057546010
ABSTRACT:
A circuit for reducing switching noise caused by harmonics of an output coupled to a band of interest in a mixed signal communication device, with the mixed signal communication device having a predetermined sampling clock. The circuit comprises a bandpass delta-sigma modulator for receiving an input centered at intermediate frequency ("IF") to generate a digital output, In-phase and Quadrature-phase digital mixers for mixing the digital output from the bandpass delta-sigma modulator down to baseband digital signals, first and second digital integrators coupled to the digital mixers for integrating the baseband digital signals to generate integration outputs, first and second decimation latches coupled to the digital integrators for generating latched integration output, a programmable counter for generating jitter sampling clocks based on the predetermined sampling clock, where the jitter sampling clock has a fixed average sampling rate, first and second FIR engines coupled to the decimation latches for differentiating, low-pass filtering and droop-correcting the latched integration outputs, using the jitter sampling clocks to generate first and second filtered digital outputs.
REFERENCES:
patent: 4910468 (1990-03-01), Ohtsuka et al.
patent: 4910469 (1990-03-01), Takahashi
patent: 4910752 (1990-03-01), Yester, Jr. et al.
patent: 5023940 (1991-06-01), Johnson et al.
patent: 5367540 (1994-11-01), Kakushi et al.
patent: 5440587 (1995-08-01), Ishikawa et al.
patent: 5493721 (1996-02-01), Reis
patent: 5500874 (1996-03-01), Terrell
patent: 5619536 (1997-04-01), Gourgue
Horng Bor-Rong
Shamlou Daryush
Chin Stephen
Cray William C.
Ghayour Mohammad
Rockwell International Corporation
Yu Philip K.
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