Jitter buffer controller

Details Jitter buffer controller Jitter buffer controller

2006-07-14

2011-12-20

Ryman, Daniel (Department: 2466)

Multiplex communications

Pathfinding or routing

Combined circuit switching and packet switching

C370S363000, C370S412000, C370S429000, C370S516000

Reexamination Certificate

active

08081622

ABSTRACT:
It is an object of this invention to improve speech quality in voice communications.Provided is a jitter buffer controller for controlling a jitter buffer in which arrived packets are accumulated, including: a jitter measuring portion for measuring jitters in the arrived packets; a judging portion for judging whether or not the jitters of the packets can be absorbed with an accumulation capacity of the jitter buffer; a determining portion for determining levels of importance of the packets; and a control portion for performing reproduction processing or discarding processing on a packet, among the packets accumulated in the jitter buffer, having jitter that cannot be absorbed with the accumulation capacity of the buffer, depending on a level of importance of the packet.

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English Abstract translation of JP 02183638 A, Inventor: Tanaka et al.
European Search Report dated Jul. 20, 2009, from the corresponding European Application.
Notice of Reason for Rejection dated Sep. 14, 2010, from the corresponding Japanese Application.
Notice of Reason for Rejection dated Jan. 25, 2011, from the corresponding Japanese Application.

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