Isolation verification for implementing modular redundancy...

Details Isolation verification for implementing modular redundancy... Isolation verification for implementing modular redundancy...

2008-12-18

2011-11-22

Lin, Sun (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Logic design processing

C716S104000, C716S111000, C716S116000

Reexamination Certificate

active

08065642

ABSTRACT:
A computer-implemented method of verifying isolation of a plurality of instances of a redundant module of a circuit design that is implemented within a single, programmable integrated circuit can include counting component failures needed to establish a connection between at least two different ones of the plurality of instances of the redundant module. The method can include determining whether each instance of the redundant module is isolated from each other instance of the redundant module according to the counting of component failures, and outputting an indication whether each of the plurality of instances of the redundant module is isolated.

REFERENCES:
patent: 5210756 (1993-05-01), Kummer et al.
patent: 6624654 (2003-09-01), Trimberger
patent: 6720793 (2004-04-01), Trimberger
patent: 6812731 (2004-11-01), Trimberger
patent: 7949974 (2011-05-01), Moore et al.
Xilinx, Inc.; U.S. Appl. No. 12/038,837, filed Feb. 28, 2008 by Moore et al.

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