Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2008-09-11
2010-06-08
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S429000, C257SE21620
Reexamination Certificate
active
07732247
ABSTRACT:
Isolation methods and devices for isolating regions of a semiconductor device. The isolation method and structure include forming an isolating trench in an active area and filling the trench with a doped conductive material containing silicon. Suitable conductive materials containing silicon include polysilicon and silicon-germanium. There is also provided a method and structure for isolating the regions by providing a trench in an active area of a substrate, growing an epitaxial layer in the trench to fill the trench or to partially fill the trench and depositing an insulating material over the epitaxial layer and within the trench to completely fill the trench.
REFERENCES:
patent: 4473598 (1984-09-01), Ephrath et al.
patent: 4528047 (1985-07-01), Beyer et al.
patent: 4683486 (1987-07-01), Chatterjee
patent: 4713678 (1987-12-01), Womack et al.
patent: 4728624 (1988-03-01), Silvestri et al.
patent: 4820654 (1989-04-01), Lee
patent: 4824793 (1989-04-01), Richardson et al.
patent: 4847214 (1989-07-01), Robb et al.
patent: 4886763 (1989-12-01), Suzuki
patent: 4965217 (1990-10-01), Desilets et al.
patent: 5073516 (1991-12-01), Moslehi
patent: 5087586 (1992-02-01), Chan et al.
patent: 5212110 (1993-05-01), Pfiester et al.
patent: 5308785 (1994-05-01), Comfort et al.
patent: 5365097 (1994-11-01), Kenney
patent: 5451809 (1995-09-01), Shiozawa et al.
patent: 6051469 (2000-04-01), Sheu et al.
patent: 6103594 (2000-08-01), See et al.
patent: 6118142 (2000-09-01), Chen et al.
patent: 6177333 (2001-01-01), Rhodes
patent: 6204524 (2001-03-01), Rhodes
patent: 6232626 (2001-05-01), Rhodes
patent: 6483163 (2002-11-01), Isogai et al.
patent: 6501149 (2002-12-01), Hong
patent: 6545302 (2003-04-01), Han
patent: 6548861 (2003-04-01), Palm et al.
patent: 6555891 (2003-04-01), Furukawa et al.
patent: 6607967 (2003-08-01), Pallinti et al.
patent: 6670235 (2003-12-01), Tews et al.
patent: 6680237 (2004-01-01), Chen et al.
patent: 6723618 (2004-04-01), Meyer et al.
patent: 6911367 (2005-06-01), Blomiley et al.
patent: 6967132 (2005-11-01), Gonzalez et al.
patent: 7115933 (2006-10-01), Menut et al.
R. H. Nixon, et al.—“256×256 CMOS Active Pixel Sensor Camera-on-a-Chip,” IEEE Journal of Solid State Circuits, vol. 31, No. 12, Dec. 1996, pp. 2046-2050.
Sunetra Mendis, et al.—“CMOS Active Pixel Image Sensor,” IEEE Transactions on Electron Devices, vol. 41, No. 3, Mar. 1994, pp. 452-453.
Mouli Chandra
Rhodes Howard
Chaudhari Chandra
Dickstein & Shapiro LLP
Micro)n Technology, Inc.
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