Isolation structure of semiconductor device and method for formi

Details Isolation structure of semiconductor device and method for formi Isolation structure of semiconductor device and method for formi

1994-12-21

1995-11-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 69, 437 72, 437 73, H01L 2176

Patent

active

054686776

ABSTRACT:
An isolation structure of a semiconductor device including a channel stop diffusion region selectively formed on a portion of a single crystalline silicon substrate disposed beneath an edge of a field oxide film formed on the substrate, thereby capable of selectively increasing, irrespective of a pattern size of the field region, a channel ion concentration at an edge of a field region where the field region is connected to an active region and which region is a weak area serving to decrease a channel stop ion concentration at an interface between the field oxide film and the silicon substrate and to decrease a threshold voltage of a field transistor due to a small thickness thereof and thereby locally increasing the threshold voltage. By the local increase in threshold voltage, it is possible to prevent a degradation in insulating characteristic of the field transistor with a small pattern size.

REFERENCES:
patent: 4380481 (1983-04-01), Shimbo
patent: 5220192 (1993-06-01), Owens et al.
patent: 5242849 (1993-09-01), Sato
patent: 5376230 (1994-12-01), Ito

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