Isolation structure, non-volatile memory having the same,...

Details Isolation structure, non-volatile memory having the same,... Isolation structure, non-volatile memory having the same,...

2008-12-24

2011-11-29

Chiang, Jack (Department: 2823)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S257000, C438S585000, C438S294000, C438S295000, C257S213000, C257S506000, C257SE21409, C257SE21294, C257SE21540

Reexamination Certificate

active

08067292

ABSTRACT:
A method of forming an isolation structure, comprising: (a) providing a base having a recess; (b) forming a stop layer on the base and in the recess; (c) forming a dielectric material on the stop layer so as to allow the rest of the recess to be filled with the dielectric material; (d) removing the dielectric material over the base by performing a chemical mechanical polishing (CMP) process until a part of the stop layer is exposed so as to form a dielectric layer in the recess; and (e) removing a part of the stop layer, wherein the another part of the stop layer and the dielectric layer filled in the recess constitute the isolation structure.

REFERENCES:
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patent: 7190036 (2007-03-01), Ko et al.
patent: 7923363 (2011-04-01), Goarin et al.
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patent: 2003/0235980 (2003-12-01), Huang et al.
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patent: 2010/0055864 (2010-03-01), Williams
patent: 101019232 (2007-08-01), None
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Chinese language office action dated May 31, 2010.
English language translation of abstract of KR 2001-0063605 (published Jul. 9, 2001).
English language translation of abstract KR 10-2006-0068232 (published Jun. 21, 2001).
English language translation of abstract of CN 101019232 (published Aug. 15, 2007).

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